PIC16LF819T-E/SS Microchip Technology, PIC16LF819T-E/SS Datasheet - Page 159
![IC PIC MCU FLASH 2KX14 20SSOP](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC16LF819T-E/SS
Manufacturer Part Number
PIC16LF819T-E/SS
Description
IC PIC MCU FLASH 2KX14 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Specifications of PIC16LF819T-E/SS
Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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15.1
The BRG is a dedicated, 8-bit or 16-bit generator that
supports both the Asynchronous and Synchronous
modes of the EUSART. By default, the BRG operates
in 8-bit mode. Setting the BRG16 bit (BAUDCON<3>)
selects 16-bit mode.
The SPBRGH:SPBRG register pair controls the period
of a free-running timer. In Asynchronous mode, bits
BRGH (TXSTA<2>) and BRG16 (BAUDCON<3>) also
control the baud rate. In Synchronous mode, BRGH is
ignored. Table 15-1 shows the formula for computation
of the baud rate for different EUSART modes which
only apply in Master mode (internally generated clock).
Given the desired baud rate and F
integer value for the SPBRGH:SPBRG registers can be
calculated using the formulas in Table 15-1. From this,
the error in baud rate can be determined. An example
calculation is shown in Example 15-1. Typical baud rates
and error values for the various Asynchronous modes
are shown in Table 15-2. It may be advantageous to use
TABLE 15-1:
© 2008 Microchip Technology Inc.
Legend: x = Don’t care, n = Value of SPBRGH:SPBRG register pair
SYNC
0
0
0
0
1
1
Baud Rate Generator (BRG)
Configuration Bits
BAUD RATE FORMULAS
BRG16
0
0
1
1
0
1
BRGH
0
1
0
1
x
x
OSC
, the nearest
BRG/EUSART Mode
16-Bit/Asynchronous
16-Bit/Asynchronous
16-Bit/Synchronous
8-Bit/Asynchronous
8-Bit/Asynchronous
8-Bit/Synchronous
the high baud rate (BRGH = 1) or the 16-bit BRG to
reduce the baud rate error, or achieve a slow baud rate
for a fast oscillator frequency.
Writing a new value to the SPBRGH:SPBRG registers
causes the BRG timer to be reset (or cleared). This
ensures the BRG does not wait for a timer overflow
before outputting the new baud rate.
15.1.1
The device clock is used to generate the desired baud
rate. When one of the power-managed modes is
entered, the new clock source may be operating at a
different frequency. This may require an adjustment to
the value in the SPBRG register pair.
15.1.2
The data on the RX pin is sampled three times by a
majority detect circuit to determine if a high or a low
level is present at the RX pin.
PIC18F2450/4450
OPERATION IN POWER-MANAGED
MODES
SAMPLING
Baud Rate Formula
F
F
F
OSC
OSC
OSC
/[64 (n + 1)]
/[16 (n + 1)]
/[4 (n + 1)]
DS39760D-page 157
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