DSPIC30F6014T-20I/PF Microchip Technology, DSPIC30F6014T-20I/PF Datasheet - Page 143
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DSPIC30F6014T-20I/PF
Manufacturer Part Number
DSPIC30F6014T-20I/PF
Description
IC DSPIC MCU/DSP 144K 80TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheet
1.DSPIC30F6014-20IPF.pdf
(228 pages)
Specifications of DSPIC30F6014T-20I/PF
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
144KB (48K x 24)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
For Use With
DM300024 - KIT DEMO DSPICDEM 1.1DM300004-2 - BOARD DEMO DSPICDEM.NET 2DM300004-1 - BOARD DEMO DSPICDEM.NET 1AC164314 - MODULE SKT FOR PM3 80PFAC30F001 - MODULE SOCKET DSPIC30F 80TQFPXLT80PT2 - SOCKET TRANSITION ICE 80TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DSPIC30F6014T20IP
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F6014T-20I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
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19.8
The analog input model of the 12-bit A/D converter
is shown inFigure 19-4. The total sampling time for the
A/D is a function of the internal amplifier settling time
and the holding capacitor charge time.
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (C
to fully charge to the voltage level on the analog input
pin. The source impedance (R
impedance (R
(R
FIGURE 19-4:
© 2006 Microchip Technology Inc.
SS
) impedance combine to directly affect the time
A/D Acquisition Requirements
Note: C
IC
), and the internal sampling switch
Legend: C
VA
PIN
Rs
value depends on device package and is not tested. Effect of C
12-BIT A/D CONVERTER ANALOG INPUT MODEL
V
I leakage
R
R
C
ANx
PIN
T
IC
SS
HOLD
C
PIN
HOLD
S
= input capacitance
= threshold voltage
= leakage current at the pin due to
= interconnect resistance
= sampling switch resistance
= sample/hold capacitance (from DAC)
), the interconnect
various junctions
) must be allowed
dsPIC30F6011/6012/6013/6014
V
DD
V
V
T
T
= 0.6V
= 0.6V
R
I leakage
IC
500 nA
250
required to charge the capacitor C
impedance of the analog sources must therefore be
small enough to fully charge the holding capacitor
within the chosen sample time. To minimize the effects
of pin leakage currents on the accuracy of the A/D con-
verter, the maximum recommended source imped-
ance, R
selected (changed), this sampling function must be
completed prior to starting the conversion. The internal
holding capacitor will be in a discharged state prior to
each sample operation.
Sampling
Switch
S
, is 2.5 k . After the analog input channel is
R
SS
PIN
R
negligible if Rs
SS
V
SS
C
= DAC capacitance
= 18 pF
HOLD
3 k
HOLD
2.5 k .
DS70117F-page 141
. The combined
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