PIC16LF74-I/PTG Microchip Technology, PIC16LF74-I/PTG Datasheet - Page 90
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PIC16LF74-I/PTG
Manufacturer Part Number
PIC16LF74-I/PTG
Description
IC MCU FLASH 4KX14 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Specifications of PIC16LF74-I/PTG
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16LF74-I/PTG
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC16F7X
11.7
An A/D conversion can be started by the “special event
trigger” of the CCP2 module. This requires that the
CCP2M3:CCP2M0 bits (CCP2CON<3:0>) be pro-
grammed as 1011 and that the A/D module is enabled
(ADON bit is set). When the trigger occurs, the
GO/DONE bit will be set, starting the A/D conversion,
and the Timer1 counter will be reset to zero. Timer1 is
reset to automatically repeat the A/D acquisition period
TABLE 11-2:
DS30325B-page 88
0Bh,8Bh,
10Bh, 18Bh
0Ch
0Dh
8Ch
8Dh
1Eh
1Fh
9Fh
05h
85h
09h
89h
Legend: x = unknown, u = unchanged, - = unimplemented, read as '0'. Shaded cells are not used for A/D conversion.
Address
Note 1: Bits PSPIE and PSPIF are reserved on the PIC16F73/76; always maintain these bits clear.
Use of the CCP Trigger
2: These registers are reserved on the PIC16F73/76.
INTCON
PIR1
PIR2
PIE1
PIE2
ADRES
ADCON0
ADCON1
PORTA
TRISA
PORTE
TRISE
Name
(2)
SUMMARY OF A/D REGISTERS
(2)
PSPIE
PSPIF
A/D Result Register
ADCS1
Bit 7
GIE
IBF
—
—
—
—
—
—
(1)
(1)
ADCS0
ADIE
Bit 6
PEIE
ADIF
OBF
—
—
—
—
—
—
TMR0IE
PORTA Data Direction Register
CHS2
RCIE
IBOV
RCIF
Bit 5
RA5
—
—
—
—
PSPMODE
CHS1
INTE
Bit 4
TXIF
TXIE
RA4
—
—
—
—
SSPIF
SSPIE
CHS0 GO/DONE
RBIE
Bit 3
RA3
—
—
—
—
—
with minimal software overhead (moving the ADRES to
the desired location). The appropriate analog input
channel must be selected and an appropriate acquisi-
tion time should pass before the “special event trigger”
sets the GO/DONE bit (starts a conversion).
If the A/D module is not enabled (ADON is cleared),
then the “special event trigger” will be ignored by the
A/D module, but will still reset the Timer1 counter.
PORTE Data Direction Bits
TMR0IF
CCP1IF
CCP1IE
PCFG2
Bit 2
RA2
RE2
—
—
TMR2IF TMR1IF 0000 0000 0000 0000
TMR2IE TMR1IE 0000 0000 0000 0000
PCFG1
Bit 1
INTF
RA1
RE1
—
—
—
CCP2IF ---- ---0 ---- ---0
CCP2IE ---- ---0 ---- ---0
PCFG0 ---- -000 ---- -000
ADON
RBIF
Bit 0
RA0
RE0
2002 Microchip Technology Inc.
0000 000x 0000 000u
xxxx xxxx uuuu uuuu
0000 00-0 0000 00-0
--0x 0000 --0u 0000
--11 1111 --11 1111
---- -xxx ---- -uuu
0000 -111 0000 -111
Value on:
POR,
BOR
Value on
RESETS
all other
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