AT89C51CC03C-S3SIM Atmel, AT89C51CC03C-S3SIM Datasheet - Page 87
![IC 8051 MCU FLASH 64K 52PLCC](/photos/12/13/121324/453-52-plcc_sml.jpg)
AT89C51CC03C-S3SIM
Manufacturer Part Number
AT89C51CC03C-S3SIM
Description
IC 8051 MCU FLASH 64K 52PLCC
Manufacturer
Atmel
Series
AT89C CANr
Datasheets
1.AT89C51CC03C-S3RIM.pdf
(198 pages)
2.AT89C51CC03C-S3RIM.pdf
(32 pages)
3.AT89C51CC03C-S3RIM.pdf
(27 pages)
4.AT89C51CC03C-S3RIM.pdf
(184 pages)
Specifications of AT89C51CC03C-S3SIM
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
36
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
AT89C51CC03CS3SIM
Available stocks
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Manufacturer
Quantity
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- AT89C51CC03C-S3RIM PDF datasheet
- AT89C51CC03C-S3RIM PDF datasheet #2
- AT89C51CC03C-S3RIM PDF datasheet #3
- AT89C51CC03C-S3RIM PDF datasheet #4
- Current page: 87 of 198
- Download datasheet (3Mb)
Synchronization Segment
Propagation Time Segment
Phase Segment 1
Sample Point
Phase Segment 2
Information Processing Time
Bit Lengthening
4182O–CAN–09/08
Transmission Point
Time Quantum
CAN Frame
(consumer)
(producer)
(producer)
Segments
Segments
(producer)
(producer)
Figure 45. CAN Bit Construction
The first segment is used to synchronize the various bus nodes.
On transmission, at the start of this segment, the current bit level is output. If there is a
bit state change between the previous bit and the current bit, then the bus state change
is expected to occur within this segment by the receiving nodes.
This segment is used to compensate for signal delays across the network.
This is necessary to compensate for signal propagation delays on the bus line and
through the transceivers of the bus nodes.
Phase Segment 1 is used to compensate for edge phase errors.
This segment may be lengthened during resynchronization.
The sample point is the point of time at which the bus level is read and interpreted as the
value of the respective bit. Its location is at the end of Phase Segment 1 (between the
two Phase Segments).
This segment is also used to compensate for edge phase errors.
This segment may be shortened during resynchronization, but the length has to be at
least as long as the information processing time and may not be more than the length of
Phase Segment 1.
It is the time required for the logic to determine the bit level of a sampled bit.
The Information processing Time begins at the sample point, is measured in TQ and is
fixed at 2 TQ for the Atmel CAN. Since Phase Segment 2 also begins at the sample
point and is the last segment in the bit time, Phase Segment 2 minimum shall not be
less than the Information processing Time.
As a result of resynchronization, Phase Segment 1 may be lengthened or Phase Seg-
ment 2 may be shortened to compensate for oscillator tolerances. If, for example, the
transmitter oscillator is slower than the receiver oscillator, the next falling edge used for
resynchronization may be delayed. So Phase Segment 1 is lengthened in order to
adjust the sample point and the end of the bit time.
SYNC_SEG
propagation
delay
SYNC_SEG
PROP_SEG
PROP_SEG
Nominal CAN Bit Time
PHASE_SEG_1
PHASE_SEG_1
AT89C51CC03
PHASE_SEG_2
Sample Point
PHASE_SEG_2
87
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