AT89C51RB2-SLSIM Atmel, AT89C51RB2-SLSIM Datasheet - Page 81
AT89C51RB2-SLSIM
Manufacturer Part Number
AT89C51RB2-SLSIM
Description
IC 8051 MCU FLASH 16K 44PLCC
Manufacturer
Atmel
Series
89Cr
Datasheet
1.AT89C51RB2-RLTIL.pdf
(127 pages)
Specifications of AT89C51RB2-SLSIM
Core Processor
8051
Core Size
8-Bit
Speed
60MHz
Connectivity
SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
For Use With
AT89STK-11 - KIT STARTER FOR AT89C51RX2
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
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Warm Reset
Watchdog Reset
4180E–8051–10/06
Table 1. Minimum Reset Capacitor Value for a 50 kΩ Pull-down Resistor
Note:
To achieve a valid reset, the reset signal must be maintained for at least 2 machine
cycles (24 oscillator clock periods) while the oscillator is running. The number of clock
periods is mode independent (X2 or X1).
As detailed in Section “Hardware Watchdog Timer”, page 77, the WDT generates a 96-
clock period pulse on the RST pin. In order to properly propagate this pulse to the rest of
the application in case of external capacitor or power-supply supervisor circuit, a 1 kΩ
resistor must be added as shown Figure 33.
Figure 33. Reset Circuitry for WDT Reset-out Usage
Start-Up Time
Oscillator
20 ms
These values assume V
on/off sequences is too fast, the power-supply de-coupling capacitors may not be fully
discharged, leading to a bad reset sequence.
5 ms
VDD
VDD
VSS
+
RST
1K
820 nF
2.7 µF
1 ms
DD
RST
starts from 0V to the nominal value. If the time between 2
VDD
VSS
P
VDD Rise Time
10 ms
1.2 µF
3.9 µF
AT89C51RB2/RC2
From WDT
Reset Source
To CPU Core
and Peripherals
To Other
On-board
Circuitry
100 ms
(1)
12 µF
12 µF
81
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