ATTINY13-20SSJ Atmel, ATTINY13-20SSJ Datasheet - Page 10
![IC MCU AVR 1K 5V 20MHZ 8SOIC](/photos/6/50/65032/453-8-soic_sml.jpg)
ATTINY13-20SSJ
Manufacturer Part Number
ATTINY13-20SSJ
Description
IC MCU AVR 1K 5V 20MHZ 8SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY13-20SSJ
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
1KB (512 x 16)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Connectivity
-
Other names
ATTINY13-24SSJ
ATTINY13-24SSJ
ATTINY13-24SSJ
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY13-20SSJ
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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4.4
4.4.1
10
General Purpose Register File
ATtiny13
The X-register, Y-register, and Z-register
The Register File is optimized for the AVR Enhanced RISC instruction set. In order to achieve
the required performance and flexibility, the following input/output schemes are supported by the
Register File:
Figure 4-2
Figure 4-2.
Most of the instructions operating on the Register File have direct access to all registers, and
most of them are single cycle instructions.
As shown in
mapping them directly into the first 32 locations of the user Data Space. Although not being
physically implemented as SRAM locations, this memory organization provides great flexibility in
access of the registers, as the X-, Y- and Z-pointer registers can be set to index any register in
the file.
The registers R26..R31 have some added functions to their general purpose usage. These reg-
isters are 16-bit address pointers for indirect addressing of the data space. The three indirect
address registers X, Y, and Z are defined as described in
• One 8-bit output operand and one 8-bit result input
• Two 8-bit output operands and one 8-bit result input
• Two 8-bit output operands and one 16-bit result input
• One 16-bit output operand and one 16-bit result input
Registers
Purpose
Working
General
shows the structure of the 32 general purpose working registers in the CPU.
Figure 4-2 on page
AVR CPU General Purpose Working Registers
10, each register is also assigned a Data memory address,
7
R13
R14
R15
R16
R17
R26
R27
R28
R29
R30
R31
R0
R1
R2
…
…
0
Figure 4-3 on page
Addr.
0x0D
0x1A
0x1B
0x1C
0x1D
0x00
0x01
0x02
0x0E
0x0F
0x10
0x11
0x1E
0x1F
X-register High Byte
Y-register High Byte
Z-register High Byte
X-register Low Byte
Y-register Low Byte
Z-register Low Byte
11.
2535J–AVR–08/10
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