ATTINY13V-10SSJ Atmel, ATTINY13V-10SSJ Datasheet - Page 70
![IC MCU AVR 1K 5V 10MHZ 8SOIC](/photos/6/50/65032/453-8-soic_sml.jpg)
ATTINY13V-10SSJ
Manufacturer Part Number
ATTINY13V-10SSJ
Description
IC MCU AVR 1K 5V 10MHZ 8SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY13V-10SSJ
Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
1KB (512 x 16)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Connectivity
-
Other names
ATTINY13V-12SSJ
ATTINY13V-12SSJ
ATTINY13V-12SSJ
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ATtiny13
Table 11-3.
Note:
Table 11-4
rect PWM mode.
Table 11-4.
Note:
• Bits 5:4 – COM0B1:0: Compare Match Output B Mode
These bits control the Output Compare pin (OC0B) behavior. If one or both of the COM0B1:0
bits are set, the OC0B output overrides the normal port functionality of the I/O pin it is connected
to. However, note that the Data Direction Register (DDR) bit corresponding to the OC0B pin
must be set in order to enable the output driver.
When OC0B is connected to the pin, the function of the COM0B1:0 bits depends on the
WGM02:0 bit setting.
Table 11-5 on page 71
a normal or CTC mode (non-PWM).
COM0A1
COM01
0
0
1
1
0
0
1
1
1. A special case occurs when OCR0A equals TOP and COM0A1 is set. In this case, the Com-
1. A special case occurs when OCR0A equals TOP and COM0A1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at TOP. See
for more details.
pare Match is ignored, but the set or clear is done at TOP. See
page 66
shows the COM0A1:0 bit functionality when the WGM02:0 bits are set to phase cor-
Compare Output Mode, Fast PWM Mode
Compare Output Mode, Phase Correct PWM Mode
COM0A0
COM00
for more details.
0
1
0
1
0
1
0
1
shows the COM0B1:0 bit functionality when the WGM02:0 bits are set to
Description
Normal port operation, OC0A disconnected.
WGM02 = 0: Normal Port Operation, OC0A Disconnected.
WGM02 = 1: Toggle OC0A on Compare Match.
Clear OC0A on Compare Match when up-counting. Set OC0A on
Compare Match when down-counting.
Set OC0A on Compare Match when up-counting. Clear OC0A on
Compare Match when down-counting.
Description
Normal port operation, OC0A disconnected.
WGM02 = 0: Normal Port Operation, OC0A Disconnected.
WGM02 = 1: Toggle OC0A on Compare Match.
Clear OC0A on Compare Match, set OC0A at TOP
Set OC0A on Compare Match, clear OC0A at TOP
(1)
(1)
“Phase Correct PWM Mode” on
“Fast PWM Mode” on page 64
2535J–AVR–08/10
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