ATTINY26-16SJ Atmel, ATTINY26-16SJ Datasheet - Page 45
![ID MCU AVR 2K 5V 16MHZ 20-SOIC](/photos/6/80/68042/453-20-soic_sml.jpg)
ATTINY26-16SJ
Manufacturer Part Number
ATTINY26-16SJ
Description
ID MCU AVR 2K 5V 16MHZ 20-SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY26-16SJ
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Digital Input Enable
and Sleep Modes
1477K–AVR–08/10
The following code example shows how to set port B pins 0 and 1 high, 2 and 3 low, and define
the port pins from 4 to 7 as input with pull-ups assigned to port pins 6 and 7. The resulting pin
values are read back again, but as previously discussed, a nop instruction is included to be able
to read back the value recently assigned to some of the pins.
Note:
As shown in Figure 32, the digital input signal can be clamped to ground at the input of the
schmitt-trigger. The signal denoted SLEEP in the figure, is set by the MCU Sleep Controller in
Power-down mode, Standby mode, and ADC Noise Reduction mode to avoid high power con-
sumption if some input signals are left floating, or have an analog signal level close to V
SLEEP is overridden for port pins enabled as External Interrupt pins. If the External Interrupt
Request is not enabled, SLEEP is active also for these pins. SLEEP is also overridden by vari-
ous other alternate functions as described in “Alternate Port Functions” on page 46.
If a logic high level (“one”) is present on an Asynchronous External Interrupt pin configured as
“Interrupt on a Rising Edge, Falling Edge, or Any Logic Change on Pin” while the external inter-
rupt is not enabled, the corresponding External Interrupt Flag will be set when resuming from the
above mentioned sleep modes, as the clamping in these sleep modes produces the requested
logic change.
Assembly Code Example
C Code Example
unsigned char i;
...
; Define pull-ups and set outputs high
; Define directions for port pins
ldi
ldi
out
out
; Insert nop for synchronization
nop
; Read port pins
in
...
...
/* Define pull-ups and set outputs high */
/* Define directions for port pins */
PORTB = (1<<PB7)|(1<<PB6)|(1<<PB1)|(1<<PB0);
DDRB = (1<<DDB3)|(1<<DDB2)|(1<<DDB1)|(1<<DDB0);
/* Insert nop for synchronization*/
_NOP();
/* Read port pins */
i = PINB;
...
1. For the assembly program, two temporary registers are used to minimize the time from pull-
ups are set on pins 0, 1, 6, and 7, until the direction bits are correctly set, defining bit 2 and 3
as low and redefining bits 0 and 1 as strong high drivers.
r16,(1<<PB7)|(1<<PB6)|(1<<PB1)|(1<<PB0)
r17,(1<<DDB3)|(1<<DDB2)|(1<<DDB1)|(1<<DDB0)
PORTB,r16
DDRB,r17
r16,PINB
(1)
CC
/2.
45
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