TS87C51RD2-VIE Atmel, TS87C51RD2-VIE Datasheet - Page 26
![IC MCU 8BIT 64K OTP 40MHZ 44VQFP](/photos/6/92/69202/313-44-vqfp_sml.jpg)
TS87C51RD2-VIE
Manufacturer Part Number
TS87C51RD2-VIE
Description
IC MCU 8BIT 64K OTP 40MHZ 44VQFP
Manufacturer
Atmel
Series
87Cr
Specifications of TS87C51RD2-VIE
Core Processor
8051
Core Size
8-Bit
Speed
40/30MHz
Connectivity
UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
64KB (64K x 8)
Program Memory Type
OTP
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
26
AT/TS8xC51Rx2
The CCON SFR contains the run control bit for the PCA and the flags for the PCA timer (CF)
and each module (Refer to Table 6-5).
Table 6-5.
1.
The watchdog timer function is implemented in module 4 (See Figure 6-7).
The PCA interrupt system is shown in Figure 6-5.
CF
CR
-
CCF4
CCF3
CCF2
CCF1
CCF0
• The CIDL bit which allows the PCA to stop during idle mode.
• The WDTE bit which enables or disables the watchdog function on module 4.
• The ECF bit which when set causes an interrupt and the PCA overflow flag CF (in the CCON
• Bit CR (CCON.6) must be set by software to run the PCA. The PCA is shut off by clearing this
• Bit CF: The CF bit (CCON.7) is set when the PCA counter overflows and an interrupt will be
• Bits 0 through 4 are the flags for the modules (bit 0 for module 0, bit 1 for module 1, etc.) and
SFR) to be set when the PCA timer overflows.
bit.
generated if the ECF bit in the CMOD register is set. The CF bit can only be cleared by
software.
are set by hardware when either a match or a capture occurs. These flags also can only be
cleared by software.
Symbol
User software should not write 1s to reserved bits. These bits may be used in future 8051 family
products to invoke new features. In that case, the reset or inactive value of the new bit will be 0,
and its active value will be 1. The value read from a reserved bit is indeterminate.
Address 0D8H
CCON
CCON: PCA Counter Control Register
Function
PCA Counter Overflow flag. Set by hardware when the counter rolls over. CF flags
an interrupt if bit ECF in CMOD is set. CF may be set by either hardware or software but can only be
cleared by software.
PCA Counter Run control bit. Set by software to turn the PCA counter on. Must be cleared by
software to turn the PCA counter off.
Not implemented, reserved for future use.
PCA Module 4 interrupt flag. Set by hardware when a match or capture occurs. Must be cleared by
software.
PCA Module 3 interrupt flag. Set by hardware when a match or capture occurs. Must be cleared by
software.
PCA Module 2 interrupt flag. Set by hardware when a match or capture occurs. Must be cleared by
software.
PCA Module 1 interrupt flag. Set by hardware when a match or capture occurs. Must be cleared by
software.
PCA Module 0 interrupt flag. Set by hardware when a match or capture occurs. Must be cleared by
software.
Reset value
CF
0
CR
0
(1)
X
-
CCF4
0
CCF3
0
CCF2
0
CCF1
4188F–8051–01/08
0
CCF0
0