TS87C51RD2-MCE Atmel, TS87C51RD2-MCE Datasheet - Page 49
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TS87C51RD2-MCE
Manufacturer Part Number
TS87C51RD2-MCE
Description
IC MCU 8BIT 64K OTP 40MHZ 44VQFP
Manufacturer
Atmel
Series
87Cr
Specifications of TS87C51RD2-MCE
Core Processor
8051
Core Size
8-Bit
Speed
40/20MHz
Connectivity
UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
64KB (64K x 8)
Program Memory Type
OTP
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
7. Power-Off Flag
4188F–8051–01/08
The power-off flag allows the user to distinguish between a “cold start” reset and a “warm start”
reset.
A cold start reset is the one induced by V
applied to the device and could be generated for example by an exit from power-down.
The power-off flag (POF) is located in PCON register (See
when V
ing the user to determine the type of reset.
The POF value is only relevant with a Vcc range from 4.5V to 5.5V. For lower Vcc value, reading
POF bit will return indeterminate value.
Table 7-1.
Reset Value = 00X1 0000b
Not bit addressable
Number
SMOD1
Bit
7
6
5
4
3
2
1
0
7
CC
rises from 0 to its nominal voltage. The POF can be set or cleared by software allow-
Mnemonic
PCON Register
PCON - Power Control Register (87h)
SMOD0
SMOD1
SMOD0
POF
GF1
GF0
IDL
Bit
PD
6
-
Description
Serial port Mode bit 1
Set to select double baud rate in mode 1, 2 or 3.
Serial port Mode bit 0
Clear to select SM0 bit in SCON register.
Set to to select FE bit in SCON register.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Power-Off Flag
Clear to recognize next reset type.
Set by hardware when V
software.
General purpose Flag
Cleared by user for general purpose usage.
Set by user for general purpose usage.
General purpose Flag
Cleared by user for general purpose usage.
Set by user for general purpose usage.
Power-Down mode bit
Cleared by hardware when reset occurs.
Set to enter power-down mode.
Idle mode bit
Clear by hardware when interrupt or reset occurs.
Set to enter idle mode.
5
-
POF
CC
4
switch-on. A warm start reset occurs while V
CC
rises from 0 to its nominal voltage. Can also be set by
GF1
3
Table
GF0
AT/TS8xC51Rx2
2
7-1). POF is set by hardware
PD
1
CC
IDL
0
is still
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