TS87C58X2-VCB Atmel, TS87C58X2-VCB Datasheet
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TS87C58X2-VCB
Specifications of TS87C58X2-VCB
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TS87C58X2-VCB Summary of contents
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... TS80C54/58X2 is high performance CMOS ROM, OTP and EPROM versions of the 80C51 CMOS single chip 8-bit microcontroller. The TS8 0C54/58X2 retains atures of the Atmel 80 C51 with e xtend ed ROM/EPROM capacity (16/32 Kbytes), 256 bytes of internal RAM, a 6-source , 4-level interrupt system, an on-chip oscilator and three timer/counters. ...
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... XTAL1 XTAL2 ALE/ PROG PSEN EA/VPP (2) RD (2) WR AT/TS8xC54/8X2 2 PDIL40 PLCC44 PQFP44 F1 VQFP44 1.4 TS80C54X2 TS80C58X2 TS87C54X2 TS87C58X2 (2) (2) RAM /EPROM EUART 256x8 16/32Kx8 C51 CORE IB-bus CPU Timer 0 INT Parallel I/O Ports Ctrl Timer 1 Port 0Port 1 Port 2 Port 3 (2) (2) (2) (2) ...
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SFR Mapping The Special Function Registers (SFRs) of the TS80C54/58X2 fall into the following categories: • C51 core registers: ACC, B, DPH, DPL, PSW, SP, AUXR1 • I/O port registers: P0, P1, P2, P3 • Timer registers: T2CON, T2MOD, ...
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Table 4-1. Bit address- able 0/8 1/9 F8h F0h B 0000 0000 E8h ACC E0h 0000 0000 D8h D0h PSW 0000 0000 T2CON T2MOD C8h 0000 0000 XXXX XX00 C0h IP SADEN B8h XX00 0000 0000 0000 P3 B0h 1111 ...
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Pin Configuration P1 P1.1 / T2EX 2 P1.2 3 P1.3 4 P1.4 5 P1 P1.7 RST 9 P3.0/RxD 10 PDIL/ P3.1/TxD 11 12 P3.2/INT0 CDIL40 P3.3/INT1 13 14 P3.4/T0 15 P3.5/T1 P3.6/WR ...
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... O WR (P3.6): External data memory write strobe (P3.7): External data memory read strobe P3.4 also receives A14 during TS87C58X2 EPROM Programming Reset: A high on this pin for two machine cycles while the oscillator is running, resets the device. An internal diffused resistor to V external capacitor to V ...
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Table 5-1. Pin Description for 40/44 pin packages PIN NUMBER MNEMONIC DIL LCC MNEMONIC PIN NUMBER ALE/PROG 30 33 PSEN XTAL1 19 21 XTAL2 18 20 4431E–8051–04/06 TYPE VQFP 1.4 TYPE NAME AND FUNCTION ...
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TS80C54/58X2 Enhanced Features In comparison to the original 80C52, the TS80C54/58X2 implements some new features, which are : • The X2 option. • The Dual Data Pointer. • The Watchdog. • The 4 level interrupt priority system. • The ...
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Figure 6-2. Mode Switching Waveforms XTAL1 XTAL1:2 X2 bit CPU clock STD Mode The X2 bit in the CKCON register (See Table 6-1.) allows to switch from 12 clock cycles per instruction to 6 clock cycles and vice versa. At ...
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... Bit Number Reset Value = XXXX XXX0b Not bit addressable For further details on the X2 fe ature, please refer to ANM072 ava ilable on the web (http://www.atmel.com) AT/TS8xC54/8X2 10 CKCON Register CKCON - Clock Control Register (8Fh Bit Mnemonic Reserved - The value read from this bit is indeterminate. Do not set this bit. ...
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Dual Data Pointer Register Ddptr The additional data pointer can be used to speed up code execution and reduce code size in a number of ways. The dual DPTR structure is a way by which the chip will specify ...
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Table 7- Bit Number Reset Value = XXXX 00X0 Not bit addressable User software should not write 1s to reserved bits. These bits may be used in future 8051 family ...
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Application Software can take advantage of the additional data pointers to both increase speed and reduce code size, for example, block operations (copy, compare, search ...) are well served by using one data pointer as a ’source’ pointer and ...
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... Auto-Reload Mode The auto-reload mode configures timer 16-bit timer or event counter with automatic reload. If DCEN bit in T2MOD is cleared, timer 2 behaves as in 80C52 (refer to the Atmel Wire- less & Microcontrollers 8-bit Microcontroller Hardware description). If DCEN bit is set, timer 2 acts as an Up/down timer/counter as shown in Figure 8-1. In this mode the T2EX pin controls the direction of count ...
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Figure 8-1. Auto-Reload Mode Up/Down Counter (DCEN = 1) XTAL1 F XTAL 8.1.1 Programmable Clock-Output In the clock-out mode, timer 2 operates as a 50%-duty-cycle, programmable clock generator (See Figure 8-2) . The input clock increments TL2 at frequency F ...
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Enter a 16-bit initial value in timer registers TH2/TL2. It can be the same as the reload value or a different one depending on the application. • To start the timer, set TR2 run control bit in T2CON register. ...
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Table 8-1. 7 TF2 Bit Number Reset Value = 0000 0000b Bit addressable 4431E–8051–04/06 T2CON Register T2CON - Timer 2 Control Register (C8h EXF2 RCLK TCLK Bit Mnemonic Timer ...
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Table 8- Bit Number Reset Value = XXXX XX00b Not bit addressable AT/TS8xC54/8X2 18 T2MOD Register T2MOD - Timer 2 Mode Control Register (C9h ...
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TS80C54/58X2 Serial I/O Port The serial I/O port in the TS80C54/58X2 is compatible with the serial I/O port in the 80C52. It provides both synchronous and asynchronous communication modes. It operates as an Uni- versal Asynchronous Receiver and Transmitter ...
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Figure 9-3. SMOD0=0 SMOD0=1 SMOD0=1 9.1.1 Automatic Address Recognition The automatic address recognition feature is enabled when the multiprocessor communication feature is enabled (SM2 bit in SCON register is set). Implemented in hardware, automatic address recognition enhances the multiprocessor commu- ...
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The following is an example of how to use given addresses to address different slaves: Slave A: Slave B: Slave C: The SADEN byte is selected so that each slave may be addressed separately. For slave A, bit 0 (the ...
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Table 9-1. 7 Reset Value = 0000 0000b Not bit addressable Table 9-2. 7 Reset Value = 0000 0000b Not bit addressable AT/TS8xC54/8X2 22 SADEN - Slave Address Mask Register (B9h SADDR - Slave Address Register (A9h) ...
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Table 9-3. 7 FE/SM0 Bit Number Reset Value = 0000 0000b Bit addressable 4431E–8051–04/06 SCON Register SCON - Serial Control Register (98h SM1 SM2 REN Bit Mnemonic Framing Error ...
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Table 9-4. Table 9-5. 7 SMOD1 Bit Number Reset Value = 00X1 0000b Not bit addressable Power-off flag reset value will be 1 only after a power on (cold reset). A warm ...
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Interrupt System The TS80C54/58X2 has a total of 7 interrupt vectors: two external interrupts (INT0 and INT1), three timer interrupts (timers 0, 1 and 2) and the serial port interrupt. These interrupts are shown in Figure 10-1. Figure 10-1. ...
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If two interrupt requests of different priority levels are received simultaneously, the request of higher priority level is serviced. If interrupt requests of the same priority level are received simul- taneously, an internal polling sequence determines which request is serviced. ...
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Table 10- Bit Number Reset Value = XX00 0000b Bit addressable 4431E–8051–04/06 IP Register IP - Interrupt Priority Register (B8h PT2 PS Bit Mnemonic Reserved - ...
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Table 10- Bit Number Reset Value = XX00 0000b Not bit addressable AT/TS8xC54/8X2 28 IPH Register IPH - Interrupt Priority High Register (B7h PT2H PSH Bit ...
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Idle mode An instruction that sets PCON.0 causes that to be the last instruction executed before going into the Idle mode. In the Idle mode, the internal clock signal is gated off to the CPU, but not to the ...
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Figure 11-1. Power-Down Exit Waveform INT0 INT1 XTAL1 Active phase Exit from power-down by reset redefines all the SFRs, exit from power-down by external inter- rupt does no affect the SFRs. Exit from power-down by either reset or external interrupt ...
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Hardware Watchdog Timer The WDT is intended as a recovery method in situations where the CPU may be subjected to software upset. The WDT consists of a 14-bit counter and the WatchDog Timer ReSeT (WDTRST) SFR. The WDT is ...
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Table 12- Bit Number Reset value XXXX X000 12.1.1 WDT during Power Down and Idle In Power Down mode the oscillator stops, which means the WDT also stops. While in ...
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TM 13. ONCE Mode (ON Chip Emulation) The ONCE mode facilitates testing and debugging of systems using TS80C54/58X2 without removing the circuit from the board. The ONCE mode is invoked by driving certain pins of the TS80C54/58X2; the following sequence ...
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Power-Off Flag The power-off flag allows the user to distinguish between a “cold start” reset and a “warm start” reset. A cold start reset is the one induced by V applied to the device and could be generated for ...
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Reduced EMI Mode The ALE signal is used to demultiplex address and data buses on port 0 when used with exter- nal program or data memory. Nevertheless, during internal code execution, ALE signal is still generated. In order to ...
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TS80C54/58X2 ROM 16.1 ROM Structure The TS80C54/58X2 ROM memory is in three different arrays: • the code array:16/32 Kbytes. • the encryption array:64 bytes. • the signature array:4 bytes. 16.2 ROM Lock System The program Lock system, when programmed, ...
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TS87C54/58X2 EPROM 17.1 EPROM Structure The TS87C54/58X2 EPROM is divided in two different arrays: • the code array:16/32 Kbytes. • the encryption array:64 bytes. • In addition a third non programmable array is implemented: • the signature array: 4 ...
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... Control and program signals must be held at the levels indicated in Table 17-2. 17.3.2 Definition of terms Address Lines:P1.0-P1.7, P2.0-P2.5, P3.4 respectively for A0-A14 (P2.5 (A13) for TS87C54X2, P3.4 (A14) for TS87C58X2). Data Lines:P0.0-P0.7 for D0-D7 Control Signals:RST, PSEN, P2.6, P2.7, P3.3, P3.6, P3.7. Program Signals:ALE/PROG, EA/VPP. ...
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Figure 17-1. Set-Up Modes Configuration SIGNALS SIGNALS* * See Table 31. for proper value on these inputs 17.3.3 Programming Algorithm The Improved Quick Pulse algorithm is ...
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The encryption array cannot be directly verified. Verification of the encryption array is done by observing that the code array is well encrypted. Figure 17-2. Programming and Verification Signal’s Waveform A0-A12 D0-D7 ALE/PROG 12.75V 5V EA/VPP ...
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... Contents 30h 58h 31h 57h 60h 37h 60h B7h 60h 3Bh 60h BBh 61h FFh AT/TS8xC54/8X2 Comment Manufacturer Code: Atmel Wireless & Microcontrollers Family Code: C51 X2 Product name: TS80C58X2 Product name: TS87C58X2 Product name: TS80C54X2 Product name: TS87C54X2 Product revision number 41 ...
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... CPU was running under reset. In Atmel new devices, the CPU is no more active during reset, so the power consumption is very low but is not really representative of what will happen in the customer system. That’s why, while ...
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Symbol Parameter V Output Low Voltage, port 0 OL1 V Output Low Voltage, ALE, PSEN OL2 V Output High Voltage, ports Output High Voltage, port 0 OH1 V Output High Voltage,ALE, PSEN OH2 R RST ...
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DC Parameters for Low Voltage T = 0°C to +70° -40°C to +85° Table 19-2. Symbol Parameter V Input Low Voltage IL V Input High Voltage except XTAL1, RST IH V Input High ...
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Typicals are based on a limited number of samples and are not guaranteed. The values listed are at room temper- ature and 5V. 6. Under steady state (non-transient) conditions, I Maximum I per port pin Maximum ...
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Figure 19-3. I Figure 19- ...
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AC Parameters 19.5.1 Explanation of the AC Symbols Each timing symbol has 5 characters. The first character is always a “T” (stands for time). The other characters, depending on their positions, stand for the name of a signal or ...
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External Program Memory Characteristics Table 19-5. Table 19-6. -M Speed 40 MHz Symbol Min Max LHLL T 10 AVLL T 10 LLAX T 70 LLIV T 15 LLPL T 55 PLPH T 35 PLIV T ...
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Table 19-7. Symbol T 19.5.3 External Program Memory Read Cycle Figure 19-6. External Program Memory Read Cycle ALE PSEN PORT 0 INSTR IN ADDRESS PORT 2 OR SFR-P2 4431E–8051–04/06 AC Parameters for a Variable Clock: derating formula Standard Type Clock ...
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External Data Memory Characteristics Table 19-8. Symbol T RLRH T WLWH T RLDV T RHDX T RHDZ T LLDV T AVDV T LLWL T AVWL T QVWX T QVWH T WHQX T RLAZ T WHLH Table 19-9. Speed -M ...
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Table 19-10. AC Parameters for a Variable Clock: derating formula Symbol 19.5.5 External Data Memory Write Cycle Figure 19-7. External Data Memory Write Cycle ALE PSEN WR PORT ...
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External Data Memory Read Cycle Figure 19-8. External Data Memory Read Cycle ALE PSEN RD PORT 0 ADDRESS PORT 2 OR SFR-P2 19.5.7 Serial Port Timing - Shift Register Mode Table 19-11. Symbol Description T XLXL T QVHX T ...
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Table 19-13. AC Parameters for a Variable Clock: derating formula Symbol 19.5.8 Shift Register Timing Waveforms Figure 19-9. Shift Register Timing Waveforms 0 INSTRUCTION ALE CLOCK T QVXH OUTPUT DATA WRITE to SBUF INPUT DATA CLEAR ...
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EPROM Programming and Verification Characteristics T = 21°C to 27° verifying Table 19-14. EPROM Programming Parameters Symbol 1/T T AVGL T GHAX T DVGL T GHDX T EHSH T SHGL T GHSL T GLGH ...
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External Clock Drive Characteristics (XTAL1) Table 19-15. AC Parameters Symbol T T CHCX T T CLCH T CHCL T CHCX 19.5.12 External Clock Drive Waveforms Figure 19-11. External Clock Drive Waveforms ...
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AC Testing Input/Output Waveforms Figure 19-12. AC Testing Input/Output Waveforms inputs during testing are driven at V measurement are made at V 19.5.14 Float Waveforms Figure ...
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Figure 19-14. Clock Waveforms STATE4 CLOCK P1P2 XTAL2 ALE ...
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Ordering Information Table 20-1. Part Number Supply Voltage TS80C54X2xxx-MCA TS80C54X2xxx-MCB TS80C54X2xxx-MCC TS80C54X2xxx-MCE TS80C54X2xxx-VCA TS80C54X2xxx-VCB TS80C54X2xxx-VCC TS80C54X2xxx-VCE TS80C54X2xxx-LCA TS80C54X2xxx-LCB TS80C54X2xxx-LCC TS80C54X2xxx-LCE TS80C54X2xxx-MIA TS80C54X2xxx-MIB TS80C54X2xxx-MIC TS80C54X2xxx-MIE TS80C54X2xxx-VIA TS80C54X2xxx-VIB TS80C54X2xxx-VIC TS80C54X2xxx-VIE TS80C54X2xxx-LIA TS80C54X2xxx-LIB TS80C54X2xxx-LIC TS80C54X2xxx-LIE AT80C54X2zzz-3CSUM AT80C54X2zzz-SLSUM AT80C54X2zzz-RLTUM AT80C54X2zzz-3CSUL AT80C54X2zzz-SLSUL AT80C54X2zzz-RLTUL AT80C54X2zzz-3CSUV ...
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Part Number Supply Voltage TS87C54X2-MCC TS87C54X2-MCE 5V ±10% TS87C54X2-VCA 5V ±10% TS87C54X2-VCB 5V ±10% TS87C54X2-VCC 5V ±10% TS87C54X2-VCE 5V ±10% TS87C54X2-LCA 2.7 to 5.5V TS87C54X2-LCB 2.7 to 5.5V TS87C54X2-LCC 2.7 to 5.5V TS87C54X2-LCE 2.7 to 5.5V TS87C54X2-MIA 5V ±10% TS87C54X2-MIB ...
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... AT80C58X2zzz-SLSUM -5 to +/-10% AT80C58X2zzz-RLTUM -5 to +/-10% AT80C58X2zzz-3CSUL -5 to +/-10% AT80C58X2zzz-SLSUL -5 to +/-10% AT80C58X2zzz-RLTUL -5 to +/-10% AT80C58X2zzz-3CSUV -5 to +/-10% AT80C58X2zzz-SLSUV -5 to +/-10% AT80C58X2zzz-RLTUV -5 to +/-10% TS87C58X2-MCA 5V ±10% TS87C58X2-MCB 5V ±10% TS87C58X2-MCC 5V ±10% AT/TS8xC54/8X2 60 Temperature Range Package Commercial PDIL40 Commercial PLCC44 Commercial PQFP44 Commercial VQFP44 Commercial PDIL40 Commercial PLCC44 Commercial PQFP44 Commercial ...
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... Part Number Supply Voltage TS87C58X2-MCE 5V ±10% TS87C58X2-VCA 5V ±10% TS87C58X2-VCB 5V ±10% TS87C58X2-VCC 5V ±10% TS87C58X2-VCE 5V ±10% TS87C58X2-LCA 2.7 to 5.5V TS87C58X2-LCB 2.7 to 5.5V TS87C58X2-LCC 2.7 to 5.5V TS87C58X2-LCE 2.7 to 5.5V TS87C58X2-MIA 5V ±10% TS87C58X2-MIB 5V ±10% TS87C58X2-MIC 5V ±10% TS87C58X2-MIE 5V ±10% TS87C58X2-VIA 5V ±10% TS87C58X2-VIB 5V ±10% TS87C58X2-VIC 5V ±10% TS87C58X2-VIE 5V ± ...
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