TS87C52X2-VIB Atmel, TS87C52X2-VIB Datasheet - Page 30
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TS87C52X2-VIB
Manufacturer Part Number
TS87C52X2-VIB
Description
IC MCU 8BIT 8K OTP 40MHZ 44-PLCC
Manufacturer
Atmel
Series
87Cr
Datasheet
1.TS87C52X2-VCA.pdf
(55 pages)
Specifications of TS87C52X2-VIB
Core Processor
8051
Core Size
8-Bit
Speed
60/30MHz
Connectivity
UART/USART
Peripherals
POR
Number Of I /o
32
Program Memory Size
8KB (8K x 8)
Program Memory Type
OTP
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Reduced EMI Mode
30
TS8xCx2X2
The ALE signal is used to demultiplex address and data buses on port 0 when used with
external program or data memory. Nevertheless, during internal code execution, ALE
signal is still generated. In order to reduce EMI, ALE signal can be disabled by setting
AO bit.
The AO bit is located in AUXR register at bit location 0. As soon as AO is set, ALE is no
longer output but remains active during MOVX and MOVC instructions and external
fetches. During ALE disabling, ALE pin is weakly pulled high.
Table 18. AUXR Register
AUXR - Auxiliary Register (8Eh)
Reset Value = XXXX XXX0b
Not bit addressable
Number
Bit
7
-
7
6
5
4
3
2
1
0
Mnemonic Description
Bit
AO
6
-
-
-
-
-
-
-
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
ALE Output bit
Clear to restore ALE operation during internal fetches.
Set to disable ALE operation during internal fetches.
5
-
4
-
3
-
2
-
1
-
4184G–8051–09/06
AO
0