TS80C51RA2-VCB Atmel, TS80C51RA2-VCB Datasheet - Page 14

• Manufacturer Part Number: TS80C51RA2-VCB
• Description: IC MCU 8BIT 256BYTE 40MHZ 44PLCC
• Manufacturer: Atmel
• Series: 80Cr

Specifications of TS80C51RA2-VCB

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40/30MHz
• Connectivity: UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Type: ROMless
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

TS80C51RA2/RD2
TS83C51RB2/RC2/RD2
TS87C51RB2/RC2/RD2
6.2. Dual Data Pointer Register Ddptr
The additional data pointer can be used to speed up code execution and reduce code size in a number of
ways.
The dual DPTR structure is a way by which the chip will specify the address of an external data memory
location. There are two 16-bit DPTR registers that address the external memory, and a single bit called
DPS = AUXR1/bit0 (See Table 4.) that allows the program code to switch between them (Refer to Figure 3).
Application
Software can take advantage of the additional data pointers to both increase speed and reduce code size, for
example, block operations (copy, compare, search ...) are well served by using one data pointer as a ’source’
pointer and the other one as a "destination" pointer.
14
7
AUXR1(A2H)
Address 0A2H
AUXR1
a.
b. GF3 will not be available on first version of the RC devices.
DPS
0
Symbol
User software should not write 1s to reserved bits. These bits may be used in future 8051 family
products to invoke new feature. In that case, the reset value of the new bit will be 0, and its active
value will be 1. The value read from a reserved bit is indeterminate.
DPS
GF3
-
Reset value
Table 4. AUXR1: Auxiliary Register 1
Function
Not implemented, reserved for future use.
Data Pointer Selection.
This bit is a general purpose user flag
DPH(83H) DPL(82H)
Figure 3. Use of Dual Pointer
DPS
0
1
DPTR1
X
-
Operating Mode
DPTR0 Selected
DPTR1 Selected
DPTR0
X
-
X
-
b
.
a
X
-
GF3
0
External Data Memory
Rev. C - 06 March, 2001
X
-
X
-
DPS
0