ATTINY85-20PI Atmel, ATTINY85-20PI Datasheet - Page 28
![IC AVR MCU 8K 20MHZ 8DIP](/photos/6/50/65033/313-8-dip_sml.jpg)
ATTINY85-20PI
Manufacturer Part Number
ATTINY85-20PI
Description
IC AVR MCU 8K 20MHZ 8DIP
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY85-20PI
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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ATtiny25/45/85
Mode” on page
divided by four, providing a 1.6 MHz system clock.
Table 6-6.
Note:
When the calibrated 8 MHz internal oscillator is selected as clock source the start-up times are
determined by the SUT Fuses as shown in
Table 6-7.
Note:
In ATtiny15 Compatibility Mode start-up times are determined by SUT fuses as shown in
6-8
Table 6-8.
Note:
In summary, more information on ATtiny15 Compatibility Mode can be found in sections
(PB5:PB0)” on page
Timer/Counter1 in ATtiny15 Mode” on page
bration Bytes” on page 154
SUT[1:0]
SUT[1:0]
10
below.
00
01
11
00
01
10
11
(2)
1. The device is shipped with this option selected.
2. This setting will select ATtiny15 Compatibility Mode, where system clock is divided by four,
1. If the RSTDISBL fuse is programmed, this start-up time will be increased to 14CK + 4 ms to
2. The device is shipped with this option selected.
1. If the RSTDISBL fuse is programmed, this start-up time will be increased to 14CK + 4 ms to
resulting in a 1.6 MHz clock frequency.
ensure programming mode can be entered.
ensure programming mode can be entered.
CKSEL[3:0]
Internal Calibrated RC Oscillator Operating Modes
Start-up Times for Internal Calibrated RC Oscillator Clock
Start-up Times for Internal Calibrated RC Oscillator Clock (in ATtiny15 Mode)
0010
0011
98). Note that in this mode of operation the 6.4 MHz clock signal is always
from Power-down
from Power-down
(1)
(2)
Start-up Time
Start-up Time
2,
6 CK
6 CK
6 CK
6 CK
6 CK
6 CK
1 CK
“Internal PLL in ATtiny15 Compatibility Mode” on page
and in table
“Clock Prescaler Select” on page
Table 6-7
98,
Additional Delay from
Additional Delay from
Reset (V
Reset (V
“Limitations of debugWIRE” on page
Reserved
14CK + 64 ms
14CK + 64 ms
14CK + 64 ms
14CK + 4 ms
14CK + 4 ms
14CK
14CK
below.
CC
CC
Nominal Frequency
(1)
(1)
= 5.0V)
= 5.0V)
8.0 MHz
6.4 MHz
Recommended Usage
BOD enabled
Fast rising power
Slowly rising power
Recommended Usage
34.
2586M–AVR–07/10
144,
24,
“Port B
“8-bit
Table
“Cali-
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