AT89LP2052-16XU Atmel, AT89LP2052-16XU Datasheet - Page 6

IC 8051 MCU FLASH 2K 20TSSOP

AT89LP2052-16XU

Manufacturer Part Number
AT89LP2052-16XU
Description
IC 8051 MCU FLASH 2K 20TSSOP
Manufacturer
Atmel
Series
89LPr
Datasheets

Specifications of AT89LP2052-16XU

Core Processor
8051
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89LP2052-16XU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Low Power
6
The Atmel AT89LP Family was designed not only with performance in mind, but also
power consumption. How can an architecture designed for high performance also be low
power? Typical dynamic power is often written with the following equation where C is the
capacitance toggled, Vcc is the supply voltage and f is the operating frequency:
Power consumption can be reduced by decreasing any of these three parameters. The
AT89LP family reduces all three, with the core directly affecting both the C and f factors.
The AT89LP core was designed to limit the number of events occurring during an
instruction simply by reducing the number of clocks per instruction. The core also reduces
the amount of logic toggling during an instruction (the C factor).
Reducing the number of clocks per instruction also affects the frequency (f factor) in two
ways. A given instruction on an AT89LP takes less time than the same instruction on a
classic 8051 at the same frequency. This is critical for battery-powered applications that
spend the majority of their time in a sleep mode. An AT89LP microcontroller can complete
its active processing tasks faster than a classic 8051 and therefore spend more of its time
in a low power sleep mode for the same workload. The inverse relationship also benefits
applications that make less use of a sleep mode and have a workload that takes a fixed
amount of time. The AT89LP can complete the work in the same time as a classic 8051,
but at a much lower frequency, thereby reducing the total power consumption. For
example, an AT89LP at 2 MHz can produce the same throughput of a classic 8051 running
at 12 MHz for a power reduction of 6X.
Dual Data Pointers: Some AT89LP devices have native support for dual data pointers
with fast context switching, allowing faster access to RAM for memory intensive
applications like DSP.
Extra RAM: Some AT89LP devices include on-chip extra RAM that can be accessed in
half the time of external memory.
Extended Stack: Devices with on-chip extra RAM also provide an extended stack
option for more stack space than the standard 256-byte RAM. For example, the
AT89LP6440 supports up to 4KB of extended stack memory, allowing more flexibility
when developing with a high-level language like C.
Timer/Counters: The Timer/Counters on AT89LP can increment at a rate of once per
clock cycle. This compares to once every 12 clocks in the classic 8051. This allows for
higher frequency waveform generation and faster data rates on the UART.
Interrupts: AT89LP devices provide a higher event sampling rate, quicker response to
interrupts and faster completion of service routines.
I/O Ports: The I/O ports may be configured in four different modes: input-only
(tristated), full CMOS output, open-drain output and quasi-bidirectional (classic 8051).
Full CMOS mode allows for higher current sourcing that standard 8051s.
P
dynamic
A
TMEL
= C·V
S
S
INGLE
CC
2
C
·f
YCLE
8051 C
ORE
—AT89LP F
4088C –8051 –02/11
AMILY

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