AT89S8253-24AI Atmel, AT89S8253-24AI Datasheet - Page 14

• Manufacturer Part Number: AT89S8253-24AI
• Description: IC 8051 MCU FLASH 12K 44TQFP
• Manufacturer: Atmel
• Series: 89Sr

Specifications of AT89S8253-24AI

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 24MHz
• Connectivity: SPI, UART/USART
• Peripherals: POR, WDT
• Number Of I /o: 32
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SPI, UART
• Maximum Clock Frequency: 24 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3 bit
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Converters: -
• Lead Free Status / Rohs Status: No RoHS Version Available

9. Timer 0 and 1
10. Timer 2
14
AT89S8253
Timer 0 and Timer 1 in the AT89S8253 operate the same way as Timer 0 and Timer 1 in the
AT89S51 and AT89S52. For more detailed information on the Timer/Counter operation, please
click on the document link below:
Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an event counter. The
type of operation is selected by bit C/T2 in the SFR T2CON (see
2 has three operating modes: capture, auto-reload (up or down counting), and baud rate gener-
ator. The modes are selected by bits in T2CON, as shown in
Timer 2 consists of two 8-bit registers, TH2 and TL2. In the Timer function, the TL2 register is
incremented every machine cycle. Since a machine cycle consists of 12 oscillator periods, the
count rate is 1/12 of the oscillator frequency.
In the Counter function, the register is incremented in response to a 1-to-0 transition at its corre-
sponding external input pin, T2. In this function, the external input is sampled during S5P2 of
every machine cycle. When the samples show a high in one cycle and a low in the next cycle,
the count is incremented. The new count value appears in the register during S3P1 of the cycle
following the one in which the transition was detected. Since two machine cycles (24 oscillator
periods) are required to recognize a 1-to-0 transition, the maximum count rate is 1/24 of the
oscillator frequency. To ensure that a given level is sampled at least once before it changes, the
level should be held for at least one full machine cycle.
Table 10-1.
http://www.atmel.com/dyn/resources/prod_documents/DOC4316.PDF
RCLK + TCLK
X
0
0
1
Timer 2 Operating Modes
CP/RL2
X
X
0
1
TR2
1
1
1
0
MODE
16-bit Auto-reload
16-bit Capture
Baud Rate Generator
(Off)
Table
Table 10-2 on page
10-2.
3286P–MICRO–3/10
15). Timer