DSPIC30F2011T-20I/ML Microchip Technology, DSPIC30F2011T-20I/ML Datasheet - Page 8

IC DSPIC MCU/DSP 12K 28QFN

DSPIC30F2011T-20I/ML

Manufacturer Part Number
DSPIC30F2011T-20I/ML
Description
IC DSPIC MCU/DSP 12K 28QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F2011T-20I/ML

Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
For Use With
DAF30-4 - DEVICE ATP FOR ICE4000
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
dsPIC30F2011/2012
10. Module: Sleep Mode
EXAMPLE 6:
DS80450D-page 8
; ----------------------------------------------------------------------------------------------
.global __reset
.global _main
.global _GotoSleep
.global __AddressError
.global __INT1Interrupt
; ----------------------------------------------------------------------------------------------
_main:
_continue:
; ----------------------------------------------------------------------------------------------
; Address Error Trap
__AddressError:
; ----------------------------------------------------------------------------------------------
__INT1Interrupt:
; ----------------------------------------------------------------------------------------------
_GotoSleep:
; fill remainder of the last row with NOP instructions
; Place SLEEP instruction in the last word of program memory
Execution of the Sleep instruction (PWRSAV #0)
may cause incorrect program operation after the
device wakes up from Sleep. The current
consumption during Sleep may also increase
beyond the specifications listed in the device data
sheet.
Work arounds
To avoid this issue, implement any of the following
three work arounds, depending on the application
requirements.
Work around 1:
Ensure that the PWRSAV #0 instruction is located
at the end of the last row of program Flash memory
available on the target device and fill the
remainder of the row with NOP instructions.
.section *, code
BSET
BCLR
BSET
CALL
BRA
BCLR
; Set program memory return address to _continue
POP.D
MOV.B
MOV
PUSH.D W0
RETFIE
BCLR
RETFIE
.section *, code, address (0x1FC0)
.rept 31
.endr
PWRSAV #0
NOP
_continue
W0
#tblpage (_continue), W1
#tbloffset (_continue), W0
IFS1, #INT1IF
INTCON2, #INT1EP
IFS1, #INT1IF
IEC1, #INT1IE
_GotoSleep
INTCON1, #ADDRERR
; Set up INT pins to detect falling edge
; Clear interrupt pin interrupt flag bits
; Enable ISR processing for INT pins
; Call function to enter SLEEP mode
; Ensure flag is reset
; Return from Interrupt Service Routine
This can be accomplished by replacing all
occurrences of the PWRSAV #0 instruction with a
function call to a suitably aligned subroutine. The
address( ) attribute provided by the MPLAB
ASM30 assembler can be utilized to correctly align
the instructions in the subroutine. For an
application written in C, the function call would be
GotoSleep( ), while for an assembly language
application,
CALL _GotoSleep.
The address error Trap Service Routine (TSR)
software can then replace the invalid return
address saved on the stack with the address of the
instruction immediately following the _GotoSleep
or GotoSleep( ) function call. This ensures that
the device continues executing the correct code
sequence after waking up from Sleep mode.
Example 6
described above.
demonstrates
the
© 2010 Microchip Technology Inc.
function
the
call
work
would
around
be

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