AT91R40807-33AU Atmel, AT91R40807-33AU Datasheet - Page 4

IC ARM7 MCU 100TQFP

AT91R40807-33AU

Manufacturer Part Number
AT91R40807-33AU
Description
IC ARM7 MCU 100TQFP
Manufacturer
Atmel
Series
AT91SAMr

Specifications of AT91R40807-33AU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, UART/USART
Peripherals
WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91R40807-33AU
Manufacturer:
ATMEL
Quantity:
2 100
Part Number:
AT91R40807-33AU
Manufacturer:
Atmel
Quantity:
10 000
Command Definition (in Hex)
Notes:
Absolute Maximum Ratings*
4
Command
Sequence
Read
Chip Erase
Main Memory Erase
Word Program
Boot Block Lockout
Product ID Entry
Product ID Exit
Product ID Exit
Temperature under Bias ................................ -55°C to +125°C
Storage Temperature ..................................... -65°C to +150°C
All Input Voltages
(including NC Pins)
with Respect to Ground ...................................-0.6V to +6.25V
All Output Voltages
with Respect to Ground .............................-0.6V to V
Voltage on OE
with Respect to Ground ...................................-0.6V to +13.5V
1. The DATA FORMAT in each bus cycle is as follows: I/O15 - I/O8 (Don’t Care); I/O7 - I/O0 (Hex).
2. The 8K word boot sector has the address range 00000H to 1FFFH.
3. Either one of the Product ID Exit commands can be used.
AT49LV1024/1025
The ADDRESS FORMAT in each bus cycle is as follows: A15 - A0 (Hex); A15 (Don’t Care).
(3)
(3)
(2)
Cycles
Bus
1
6
6
4
6
3
1
3
Addr
5555
5555
5555
5555
5555
5555
Addr
xxxx
1st Bus
Cycle
Data
D
AA
AA
AA
AA
AA
AA
F0
OUT
2AAA
2AAA
2AAA
2AAA
2AAA
2AAA
Addr
CC
2nd Bus
+ 0.6V
Cycle
Data
55
55
55
55
55
55
Addr
5555
5555
5555
5555
5555
5555
*NOTICE:
3rd Bus
Cycle
Data
A0
F0
80
80
80
90
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
Addr
5555
5555
5555
Addr
4th Bus
Cycle
Data
AA
AA
D
AA
IN
2AAA
2AAA
2AAA
Addr
5th Bus
Cycle
Data
55
55
55
Addr
5555
5555
5555
6th Bus
Cycle
1278D–07/01
Data
10
30
40

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