ATTINY44V-10MU Atmel, ATTINY44V-10MU Datasheet - Page 2
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ATTINY44V-10MU
Manufacturer Part Number
ATTINY44V-10MU
Description
IC MCU AVR 4K FLASH 10MHZ 20-QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY44V-10MU
Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-MLF®, QFN
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI
Maximum Clock Frequency
10 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Package
20MLF
Device Core
AVR
Family Name
ATtiny
Maximum Speed
10 MHz
For Use With
ATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY44V-10MU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
1. Pin Configurations
Figure 1-1.
1.1
1.1.1
1.1.2
1.1.3
2
(PCINT6/OC1A/SDA/MOSI/DI/ADC6) PA6
(ADC4/USCK/SCL/T1/PCINT4) PA4
Pin Descriptions
ATtiny24/44/84
VCC
GND
Port B (PB3:PB0)
(PCINT10/INT0/OC0A/CKOUT) PB2
NOTE
Bottom pad should be
soldered to ground.
DNC: Do Not Connect
Pinout ATtiny24/44/84
(ADC0/AREF/PCINT0) PA0
(PCINT7/ICP/OC0B/ADC7) PA7
(ADC2/AIN1/PCINT2) PA2
(ADC1/AIN0/PCINT1) PA1
(ADC3/T0/PCINT3) PA3
(PCINT11/RESET/dW) PB3
(PCINT8/XTAL1/CLKI) PB0
(PCINT9/XTAL2) PB1
Supply voltage.
Ground.
Port B is a 4-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port B output buffers have symmetrical drive characteristics with both high sink and source
capability except PB3 which has the RESET capability. To use pin PB3 as an I/O pin, instead of
RESET pin, program (‘0’) RSTDISBL fuse. As inputs, Port B pins that are externally pulled low
will source current if the pull-up resistors are activated. The Port B pins are tri-stated when a
reset condition becomes active, even if the clock is not running.
VCC
1
2
3
4
5
PDIP/SOIC
QFN/MLF
1
2
3
4
5
6
7
14
13
12
11
10
9
8
15
14
13
12
11
GND
PA0 (ADC0/AREF/PCINT0)
PA1 (ADC1/AIN0/PCINT1)
PA2 (ADC2/AIN1/PCINT2)
PA3 (ADC3/T0/PCINT3)
PA4 (ADC4/USCK/SCL/T1/PCINT4)
PA5 (ADC5/DO/MISO/OC1B/PCINT5)
Pin 16: PA6 (PCINT6/OC1A/SDA/MOSI/DI/ADC6)
Pin 20: PA5 (ADC5/DO/MISO/OC1B/PCINT5)
PA7 (PCINT7/ICP/OC0B/ADC7)
PB2 (PCINT10/INT0/OC0A/CKOUT)
PB3 (PCINT11/RESET/dW)
PB1 (PCINT9/XTAL2)
PB0 (PCINT8/XTAL1/CLKI)
8006KS–AVR–10/10