ATTINY44V-10SSU Atmel, ATTINY44V-10SSU Datasheet - Page 4

IC MCU AVR 4K FLASH 10MHZ 14SOIC

ATTINY44V-10SSU

Manufacturer Part Number
ATTINY44V-10SSU
Description
IC MCU AVR 4K FLASH 10MHZ 14SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY44V-10SSU

Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Package
14SOIC
Device Core
AVR
Family Name
ATtiny
Maximum Speed
10 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
12
Interface Type
SPI/USI
On-chip Adc
8-chx10-bit
Number Of Timers
2
For Use With
ATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY44V-10SSU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
2. Overview
4
ATtiny24/44/84
ATtiny24/44/84 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC
architecture. By executing powerful instructions in a single clock cycle, the ATtiny24/44/84
achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize
power consumption versus processing speed.
Figure 2-1.
The AVR core combines a rich instruction set with 32 general purpose working registers. All 32
registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent
registers to be accessed in one single instruction executed in one clock cycle. The resulting
architecture is more code efficient while achieving throughputs up to ten times faster than con-
ventional CISC microcontrollers.
GND
VCC
Block Diagram
PROGRAMMING
INSTRUCTION
PROGRAM
PROGRAM
REGISTER
INSTRUCTION
COUNTER
CONTROL
DECODER
FLASH
LINES
LOGIC
DATA REGISTER
PORT A
PORT A DRIVERS
ISP INTERFACE
PA7-PA0
REGISTERS
POINTER
REGISTER
PURPOSE
GENERAL
STATUS
STACK
SRAM
ALU
X
Y
Z
REG.PORT A
DATA DIR.
8-BIT DATABUS
ADC
MCU CONTROL
MCU STATUS
OSCILLATOR
WATCHDOG
INTERRUPT
REGISTER
REGISTER
INTERNAL
COUNTER0
COUNTER1
EEPROM
TIMER/
TIMER/
DATA REGISTER
TIMER
UNIT
PORT B
PORT B DRIVERS
PB3-PB0
OSCILLATORS
CALIBRATED
OSCILLATOR
TIMING AND
REG.PORT B
INTERNAL
CONTROL
DATA DIR.
8006K–AVR–10/10

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