ATMEGA88P-20PU Atmel, ATMEGA88P-20PU Datasheet

no-image

ATMEGA88P-20PU

Manufacturer Part Number
ATMEGA88P-20PU
Description
MCU AVR 8K ISP FLASH 20MHZ 28DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA88P-20PU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Processor Series
ATMEGA8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATASTK512-EK1-IND
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Controller Family/series
AVR MEGA
No. Of I/o's
23
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
20MHz
Rohs Compliant
Yes
For Use With
ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Bonase Electronics (HK) Co., Limited Bonase Electronics (HK) Co., Limited
Part Number:
ATMEGA88P-20PU
Manufacturer:
SEMIKRON
Quantity:
100
Price:
Features
Note:
High Performance, Low Power AVR
Advanced RISC Architecture
High Endurance Non-volatile Memory Segments
Peripheral Features
Special Microcontroller Features
I/O and Packages
Operating Voltage:
Temperature Range:
Speed Grade:
Low Power Consumption at 1 MHz, 1.8V, 25°C:
– 131 Powerful Instructions – Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 20 MIPS Throughput at 20 MHz
– On-chip 2-cycle Multiplier
– 4/8/16K Bytes of In-System Self-Programmable Flash progam memory
– 256/512/512 Bytes EEPROM
– 512/1K/1K Bytes Internal SRAM
– Write/Erase Cycles: 10,000 Flash/100,000 EEPROM
– Data retention: 20 years at 85°C/100 years at 25°C
– Optional Boot Code Section with Independent Lock Bits
– Programming Lock for Software Security
– Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode
– One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture
– Real Time Counter with Separate Oscillator
– Six PWM Channels
– 8-channel 10-bit ADC in TQFP and QFN/MLF package
– 6-channel 10-bit ADC in PDIP Package
– Programmable Serial USART
– Master/Slave SPI Serial Interface
– Byte-oriented 2-wire Serial Interface (Philips I
– Programmable Watchdog Timer with Separate On-chip Oscillator
– On-chip Analog Comparator
– Interrupt and Wake-up on Pin Change
– Power-on Reset and Programmable Brown-out Detection
– Internal Calibrated Oscillator
– External and Internal Interrupt Sources
– Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby,
– 23 Programmable I/O Lines
– 28-pin PDIP, 32-lead TQFP, 28-pad QFN/MLF and 32-pad QFN/MLF
– 1.8 - 5.5V for ATmega48P/88P/168PV
– 2.7 - 5.5V for ATmega48P/88P/168P
– -40
– ATmega48P/88P/168PV: 0 - 4 MHz @ 1.8 - 5.5V, 0 - 10 MHz @ 2.7 - 5.5V
– ATmega48P/88P/168P: 0 - 10 MHz @ 2.7 - 5.5V, 0 - 20 MHz @ 4.5 - 5.5V
– Active Mode: 0.3 mA
– Power-down Mode: 0.1 µA
– Power-save Mode: 0.8 µA (Including 32 kHz RTC)
Mode
and Extended Standby
In-System Programming by On-chip Boot Program
True Read-While-Write Operation
Temperature Measurement
Temperature Measurement
1. See
°
C to 85
”Data Retention” on page 7
°
C
®
8-Bit Microcontroller
for details.
2
C compatible)
(1)
8-bit
Microcontroller
with 4/8/16K
Bytes In-System
Programmable
Flash
ATmega48P/V
ATmega88P/V
ATmega168P/V
Summary
Rev. 8025LS–AVR–7/10

Related parts for ATMEGA88P-20PU

ATMEGA88P-20PU Summary of contents

Page 1

... Power-down Mode: 0.1 µA – Power-save Mode: 0.8 µA (Including 32 kHz RTC) Note: 1. See ”Data Retention” on page 7 ® 8-Bit Microcontroller ( compatible) for details. 8-bit Microcontroller with 4/8/16K Bytes In-System Programmable Flash ATmega48P/V ATmega88P/V ATmega168P/V Summary Rev. 8025LS–AVR–7/10 ...

Page 2

Pin Configurations Figure 1-1. Pinout ATmega48P/88P/168P TQFP Top View (PCINT19/OC2B/INT1) PD3 1 (PCINT20/XCK/T0) PD4 2 GND 3 VCC 4 GND 5 VCC 6 (PCINT6/XTAL1/TOSC1) PB6 7 (PCINT7/XTAL2/TOSC2) PB7 8 28 MLF Top View (PCINT19/OC2B/INT1) PD3 1 (PCINT20/XCK/T0) PD4 2 ...

Page 3

Pin Descriptions 1.1.1 VCC Digital supply voltage. 1.1.2 GND Ground. 1.1.3 Port B (PB7:0) XTAL1/XTAL2/TOSC1/TOSC2 Port 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output buffers have symmetrical drive ...

Page 4

The various special features of Port D are elaborated in 85. 1.1 the supply voltage pin for the A/D Converter, PC3:0, and ADC7:6. It should be externally CC connected to V through a low-pass filter. Note ...

Page 5

Block Diagram Figure 2-1. Block Diagram Watchdog Watchdog Oscillator Oscillator Circuits / Generation EEPROM 8bit T/C 0 8bit T/C 2 USART 0 PORT D (8) 8025LS–AVR–7/10 Power Timer Supervision POR / BOD & RESET Flash Clock 16bit T/C 1 ...

Page 6

... C Compilers, Macro Assemblers, Program Debugger/Simulators, In-Circuit Emulators, and Evaluation kits. 2.2 Comparison Between ATmega48P, ATmega88P and ATmega168P The ATmega48P, ATmega88P and ATmega168P differ only in memory sizes, boot loader sup- port, and interrupt vector sizes. sizes for the three devices. Table 2-1. ...

Page 7

In ATmega48P, there is no Read-While-Write support and no separate Boot Loader Section. The SPM instruction can execute from the entire Flash. 8025LS–AVR–7/10 ATmega48P/88P/168P 7 ...

Page 8

... Resources A comprehensive set of development tools, application notes and datasheets are available for download on http://www.atmel.com/avr. Note: 4. Data Retention Reliability Qualification results show that the projected data retention failure rate is much less than 1 PPM over 20 years at 85°C or 100 years at 25°C. ...

Page 9

Register Summary Address Name Bit 7 (0xFF) Reserved – (0xFE) Reserved – (0xFD) Reserved – (0xFC) Reserved – (0xFB) Reserved – (0xFA) Reserved – (0xF9) Reserved – (0xF8) Reserved – (0xF7) Reserved – (0xF6) Reserved – (0xF5) Reserved – ...

Page 10

Address Name Bit 7 (0xC1) UCSR0B RXCIE0 (0xC0) UCSR0A RXC0 (0xBF) Reserved – (0xBE) Reserved – (0xBD) TWAMR TWAM6 (0xBC) TWCR TWINT (0xBB) TWDR (0xBA) TWAR TWA6 (0xB9) TWSR TWS7 (0xB8) TWBR (0xB7) Reserved – (0xB6) ASSR – (0xB5) Reserved ...

Page 11

Address Name Bit 7 (0x7F) DIDR1 – (0x7E) DIDR0 – (0x7D) Reserved – (0x7C) ADMUX REFS1 (0x7B) ADCSRB – (0x7A) ADCSRA ADEN (0x79) ADCH (0x78) ADCL (0x77) Reserved – (0x76) Reserved – (0x75) Reserved – (0x74) Reserved – (0x73) Reserved ...

Page 12

... Opcode for the IN and OUT instructions. For the Extended I/O space from 0x60 - 0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used. 5. Only valid for ATmega88P/168P. 8025LS–AVR–7/10 Bit 6 ...

Page 13

Instruction Set Summary Mnemonics Operands ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr Add two Registers ADC Rd, Rr Add with Carry two Registers ADIW Rdl,K Add Immediate to Word SUB Rd, Rr Subtract two Registers SUBI Rd, K Subtract ...

Page 14

Mnemonics Operands BRIE k Branch if Interrupt Enabled BRID k Branch if Interrupt Disabled BIT AND BIT-TEST INSTRUCTIONS SBI P,b Set Bit in I/O Register CBI P,b Clear Bit in I/O Register LSL Rd Logical Shift Left LSR Rd Logical ...

Page 15

Mnemonics Operands POP Rd Pop Register from Stack MCU CONTROL INSTRUCTIONS NOP No Operation SLEEP Sleep WDR Watchdog Reset BREAK Break Note: 1. These instructions are only available in ATmega168P. 8025LS–AVR–7/10 Description Rd ← STACK (see specific descr. for Sleep ...

Page 16

... Note: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. Pb-free packaging complies to the European Directive for Restriction of Hazardous Substances (RoHS directive).Also Halide free and fully Green. ...

Page 17

... Wide, Plastic Dual Inline Package (PDIP) 32M1-A 32-pad 1.0 body, Lead Pitch 0.50 mm Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) 8025LS–AVR–7/10 (2) Ordering Code ATmega88PV-10AU ATmega88PV-10MU ATmega88PV-10PU ATmega88P-20AU ATmega88P-20MU ATmega88P-20PU and Figure 28-2 on page 311. Package Type ATmega48P/88P/168P (1) Package Operational Range 32A Industrial 32M1-A ° ...

Page 18

... Note: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. Pb-free packaging complies to the European Directive for Restriction of Hazardous Substances (RoHS directive).Also Halide free and fully Green. ...

Page 19

Packaging Information 9.1 32A PIN 0˚~7˚ L Notes: 1. This package conforms to JEDEC reference MS-026, Variation ABA. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions ...

Page 20

... Pin TOP VIEW 0.20 b 0.4 Ref BOTTOM VIEW (4x) The terminal # Laser-marked Feature. Note: Package Drawing Contact: packagedrawings@atmel.com 8025LS–AVR–7/ TITLE 28M1, 28-pad 1.0 mm Body, Lead Pitch 0.45 mm, 2.4 x 2.4 mm Exposed Pad, Thermally Enhanced Plastic Very Thin Quad Flat No Lead Package (VQFN) ...

Page 21

Pin TOP VIEW Pin #1 Notch (0. BOTTOM VIEW Note: JEDEC Standard MO-220, Fig. 2 (Anvil Singulation), VHHD-2. 2325 Orchard Parkway San Jose, CA 95131 ...

Page 22

A SEATING PLANE Note: 1. Dimensions D and E1 do not include mold Flash or Protrusion. Mold Flash or Protrusion shall not exceed 0.25 mm (0.010"). 2325 Orchard Parkway San Jose, CA 95131 R 8025LS–AVR–7/10 ...

Page 23

... Rev known errata. 10.1.2 Rev known errata. 10.1.3 Rev. A Not Sampled. 10.2 Errata ATmega88P The revision letter in this section refers to the revision of the ATmega88P device. 10.2.1 Rev. C Not sampled. 10.2.2 Rev known errata. 10.2.3 Rev known errata. 10.3 Errata ATmega168P The revision letter in this section refers to the revision of the ATmega168P device ...

Page 24

... Updated the footnote Note1 of the Updated the Table 8-5 on page 30 Updated the Table 8-10 on page 33 Updated the footnote Note1 of the ATmega48P/88P/168P ”ATmega48P DC Characteris- ”ATmega88P DC Characteris- ”ATmega168P DC Characteris- ”” on page 311. 408. Table 8-3 on page 29. by removing a footnote Note1. by removing a footnote Note1. ...

Page 25

... Updated note in Table 28-4 in ”System and Reset Characteristics” on page ATmega48P/88P/168P ”ATmega48P DC Characteristics” on page 309 ”ATmega88P DC Characteristics” on page 310 ”ATmega168P DC Characteristics” on page 310 ”” on page 311 and removed TBD from the table. Table 28-4 on page 313 correct one. ...

Page 26

... Ordering codes for ”Packaging Information” on page 404 - ATmega328P is offered in 20 MHz option only. Added Errata for ATmega328P rev. B, Power-save Maximum values removed form page 309, ”ATmega88P DC Characteristics” on page Characteristics” on page 310. Updated ”Features” on page 1. Added ”Data Retention” on page 7 ...

Page 27

... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...

Related keywords