EP7312-CV-90 Cirrus Logic Inc, EP7312-CV-90 Datasheet - Page 36
![IC ARM720T MCU 90MHZ 208-LQFP](/photos/12/44/124401/ep7312-cv-90_sml.jpg)
EP7312-CV-90
Manufacturer Part Number
EP7312-CV-90
Description
IC ARM720T MCU 90MHZ 208-LQFP
Manufacturer
Cirrus Logic Inc
Series
EP7r
Datasheet
1.EP7312-CVZ.pdf
(64 pages)
Specifications of EP7312-CV-90
Core Processor
ARM7
Core Size
32-Bit
Speed
90MHz
Connectivity
Codec, DAI, EBI/EMI, IrDA, Keypad, SPI/Microwire1, UART/USART
Peripherals
LCD, LED, MaverickKey, PWM
Number Of I /o
27
Program Memory Type
ROMless
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 2.7 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
208-LQFP
For Use With
598-1209 - KIT DEVELOPMENT EP73XX ARM7
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Other names
598-1238
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP7312-CV-90
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
EP7312
High-Performance, Low-Power System on Chip
36
Pin
No.
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
nMOE/nSDCAS
nMWE/nSDWE
VDDCORE
VSSCORE
WAKEUP
nSDCS[1]
nSDCS[0]
nPWRFL
SDQM[3]
SDQM[2]
SDCKE
SDCLK
VDDIO
VDDIO
VDDIO
Signal
VSSIO
VSSIO
VSSIO
VSSIO
VSSIO
VSSIO
nCS[0]
nCS[1]
DD[3]
DD[2]
DD[1]
DD[0]
CL[2]
CL[1]
FRM
A[6]
D[6]
A[5]
D[5]
A[4]
D[4]
A[3]
D[3]
A[2]
D[2]
A[1]
D[1]
A[0]
D[0]
M
Table 20. 208-Pin LQFP Numeric Pin Listing (Continued)
©
Copyright Cirrus Logic, Inc. 2005
Strength
Schmitt
1
1
1
1
1
1
2
1
2
1
2
1
2
1
1
1
1
1
1
1
1
1
1
2
2
2
1
1
1
1
1
2
(All Rights Reserved)
†
Reset
State
High
High
High
High
High
High
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Core ground
Pad ground
Pad Power
Core Pwr
Pad Gnd
Pad Gnd
Pad Gnd
Pad Gnd
Pad Gnd
Pad Pwr
Pad Pwr
Type
Out
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
enable/ SDRAM write enable
enable/SDRAM CAS control
SDRAM clock enable output
LCD frame synchronization
SDRAM byte lane mask
SDRAM byte lane mask
LCD serial display data
LCD serial display data
LCD serial display data
LCD serial display data
Digital I/O power, 3.3 V
Digital I/O power, 3.3 V
Digital I/O power, 3.3 V
System wake up input
Power fail sense input
ROM, expansion write
System byte address
System byte address
System byte address
System byte address
System byte address
System byte address
System byte address
SDRAM chip select 1
SDRAM chip select 0
ROM, expansion OP
LCD pixel clock out
LCD AC bias drive
Core power, 2.5 V
SDRAM clock out
LCD line clock
control signal
Chip select 0
Chip select 1
Description
Core ground
I/O ground
I/O ground
I/O ground
I/O ground
I/O ground
I/O ground
Data I/O
Data I/O
Data I/O
Data I/O
Data I/O
Data I/O
Data I/O
signal
pulse
DS508F1