Z8F4802VS020SC Zilog, Z8F4802VS020SC Datasheet - Page 135
Z8F4802VS020SC
Manufacturer Part Number
Z8F4802VS020SC
Description
IC ENCORE MCU FLASH 48K 68-PLCC
Manufacturer
Zilog
Series
Encore!®r
Specifications of Z8F4802VS020SC
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
46
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
68-LCC (J-Lead)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
269-3146
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4. The I
5. After the first bit has been shifted out, a Transmit interrupt is asserted.
6. Software responds by writing eight bits of address to the I
7. The I
8. The I
9. The I
10. The I
11. Software responds by setting the START bit of the I
12. Software responds by writing 11110B followed by the 2-bit slave address and a 1
13. Software responds by setting the NAK bit of the I
14. After the I
15. The I
16. The I
17. The I
18. The I
19. The I
20. A Receive interrupt is generated.
21. Software responds by reading the I
22. Software responds by setting the STOP bit of the I
23. A NAK condition is sent to the I
24. A STOP condition is sent to the I
register.
high period of SCL.
register.
shifted, the I
repeated START.
(read).
Acknowledge is sent after the first byte of data has been read. If you want to read only
one byte, software responds by setting the NAK bit of the I
sends an acknowledge by pulling the SDA signal Low during the next high period of
SCL.
register.
high period of SCL.
2
2
2
2
2
2
2
2
2
2
C Controller loads the I
C Controller completes shifting of the two address bits and a 0 (write).
C slave sends an acknowledge by pulling the SDA signal Low during the next
C Controller loads the I
C Controller shifts out the next eight bits of address. After the first bits are
C Controller sends the repeated START condition.
C Controller loads the I
C Controller sends
C slave sends an acknowledge by pulling the SDA signal Low during the next
C slave sends a byte of data.
2
C Controller shifts out the address bits mentioned in step 9, the I
2
C Controller generates a Transmit interrupt.
11110B
2
2
2
C Shift register with the contents of the I
C Shift register with the contents of the I
C Shift register with the contents of the I
2
Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
2
C slave.
C slave.
followed by the 2-bit slave read and a 1 (read).
2
C Data register.
2
2
C Control register, so that a Not
C Control register.
2
C Control register to generate a
2
C Data register.
2
C Control register.
Z8 Encore!
2
2
2
I2C Controller
C Data
C Data
C Data
2
C slave
®
117
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