Z8F3202VS020EC Zilog, Z8F3202VS020EC Datasheet - Page 12

• Manufacturer Part Number: Z8F3202VS020EC
• Description: IC ENCORE MCU FLASH 32K 68PLCC
• Manufacturer: Zilog
• Series: Encore!®r

Specifications of Z8F3202VS020EC

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 68-LCC (J-Lead)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: 269-3177

Table 2. Z8F640x, Z8F480x, Z8F320x, Z8F240x, Z8F160x Errata for Devices with Date
Z8F640x, Z8F480x, Z8F320x, Z8F240x, Z8F160x
The errata listed in
date code is YYWW (year and week of assembly). If you have devices with these date codes, you must
contact Zilog
sion of the product specification. Data contained in this document is Preliminary only.
Table 3. Z8F6403 Errata for Devices with Date Codes 0226 and Earlier
UP004207-0308
Sl
No
19
20
Sl
No
1
Summary
When receiving
data, the IrDA endec
may have bit errors
if the external
transmitter’s baud
rate is greater than
endec baud rate.
The DMA does not
support the ADC in
CONTINUOUS
Mode.
Summary
OCD incorrectly
single steps through
an EI instruction if
an interrupt is
pending.
Codes 0239 and Later (Continued)
®
to obtain replacements. When reviewing the following errata, refer to the most recent ver-
Table 3
Errata to Z8F640x, Z8F480x, Z8F320x, Z8F240x, Z8F160x (Z8 Encore!
are found in the Z8F6403 devices with date codes 0226 and earlier, where the
Description
The IrDA endec is sensitive to external transmitters that have baud rates
somewhat higher than the baud rate of the Z8F640x, Z8F480x, Z8F320x,
Z8F240x, Z8F160x’s endec. This can cause bit errors in the data
transmission.
Workaround
When receiving, increase the baud rate of the UART and IrDA endec by a few
percent. The endec can handle minor baud rate discrepancies to an external
transmitter that is slower, but is sensitive to an external transmitter that is
faster. When the endec is transmitting, the baud rate should be set as close as
possible to the desired baud rate.
The DMA does not support the ADC in CONTINUOUS mode.
Workaround
None.
Description
If the OCD is single stepping through an EI instruction and there are interrupts
pending, the eZ8 CPU does not pause prior to executing the interrupt and
vectors to an invalid interrupt vector address located at Program Memory
addresses 000H and 001H (the User Option Bits information).
Workaround
The OCD must look at the next instruction before single stepping and take
appropriate measures. Instead of executing the EI instruction, rewrite the PC
to the instruction following the EI and then enable interrupts through a register
write to the interrupt control register.
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