EZ80F91NA050SC Zilog, EZ80F91NA050SC Datasheet - Page 4

• Manufacturer Part Number: EZ80F91NA050SC
• Description: IC ACCLAIM MCU 256KB 144-BGA
• Manufacturer: Zilog
• Series: eZ80® Acclaim!®r

Specifications of EZ80F91NA050SC

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: Ethernet, I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 144-LBGA
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 50 MHz
• Data Ram Size: 16 KB
• Number Of Programmable I/os: 32
• Number Of Timers: 16 Bit
• Operating Supply Voltage: 3 V to 3.6 V
• Mounting Style: SMD/SMT
• Height: 1.5 mm
• Length: 13 mm
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Width: 13 mm
• For Use With: 269-4712 - KIT DEV ENCORE 32 SERIES269-4671 - BOARD ZDOTS SBC Z80ACCLAIM PLUS269-4561 - KIT DEV FOR EZ80F91 W/C-COMPILER269-4560 - KIT DEV FOR EZ80F91 W/C-COMPILER
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: No RoHS Version Available
• Other names: 269-3251

ZiLOG Debug Interface
The ZiLOG Debug Interface (ZDI) incorporates
the functions of an in-circuit emulator. ZDI allows
you to single-step code, change registers, edit
programs, and view status of the internal registers.
Block Transfer Instructions
Block transfer instructions with expanded repeat
capability are added to the eZ80
provide high-performance data transfer similar to
hardware DMAs.
Power Management
The eZ80F91 MCU supports several power
m a n a g e m e n t f e a t u r e s . Tw o p e r i p h e r a l
Power-Down Registers allow independent clock
gating of on-chip peripherals under software
control while operating under normal conditions.
The eZ80
disable the clock from driving any one of the
peripherals while they are inactive.
In addition, execution of the HALT instruction
suspends eZ80
clock power associated with the eZ80
Normal operation is restored via external and
peripheral interrupts or hardware reset.
Execution of a sleep (SLP) instruction provides the
lowest power consumption. In SLEEP mode, only
the on-chip RTC 32 KHz crystal oscillator remains
active to drive the RTC and the WDT. Other
peripherals like the system clock, and the primary
oscillator are disabled. You can reset the device by
RTC alarm, a WDT time-out, or hardware reset.
PB013505-0607
®
CPU writes to the control registers to
®
CPU operation and eliminates
®
®
CPU. They
CPU core.
Electrical Features Summary
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Support Tools
The following development tools are available to
program and debug the eZ80F91 MCU:
Hardware
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Software
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Power supply, 3.3 V ± 0.3 V
Standard temperature, 0 ºC to 70 ºC
Extended temperature, –40 ºC to +105 ºC
Supply current at 50 MHz; 50 mA (typical)
Supply current in HALT mode with peripherals
powered down; <5 mA (typical)
Supply current in SLEEP mode; <50 µA
(typical)
eZ80
eZ80F91 Module
ZiLOG TCP/IP (ZTP) software suite
ANSI C-Compiler
ZiLOG Developer’s Studio Integrated
Development Environment (ZDS II IDE)
including assembler, linker, debugger, and sim-
ulator
®
Development Platform with plug-in
eZ80Acclaim!
®
Flash Microcontrollers
eZ80F91 MCU
Product Brief
4