Z8F042AHJ020EC00TR Zilog, Z8F042AHJ020EC00TR Datasheet - Page 122
Z8F042AHJ020EC00TR
Manufacturer Part Number
Z8F042AHJ020EC00TR
Description
IC ENCORE XP MCU FLASH 4K 28SSOP
Manufacturer
Zilog
Series
Encore!® XP®r
Specifications of Z8F042AHJ020EC00TR
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
Number Of I /o
23
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
Z8F042AHJ020EC00T
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Table 63. UART Status 0 Register (U0STAT0)
BITS
FIELD
RESET
R/W
ADDR
PS022825-0908
UART Status 0 Register
RDA
R
7
0
1 = Received data does not generate an interrupt request to the Interrupt Controller. Only
receiver errors generate an interrupt request.
IREN—Infrared Encoder/Decoder Enable
0 = Infrared Encoder/Decoder is disabled. UART operates normally.
1 = Infrared Encoder/Decoder is enabled. The UART transmits and receives data through
the Infrared Encoder/Decoder.
The UART Status 0 (UxSTAT0) and Status 1(UxSTAT1) registers
identify the current UART operating configuration and status.
RDA—Receive Data Available
This bit indicates that the UART Receive Data register has received data. Reading the
UART Receive Data register clears this bit.
0 = The UART Receive Data register is empty.
1 = There is a byte in the UART Receive Data register.
PE—Parity Error
This bit indicates that a parity error has occurred. Reading the UART Receive Data regis-
ter clears this bit.
0 = No parity error has occurred.
1 = A parity error has occurred.
OE—Overrun Error
This bit indicates that an overrun error has occurred. An overrun occurs when new data is
received and the UART Receive Data register has not been read. If the RDA bit is reset to
0, reading the UART Receive Data register clears this bit.
0 = No overrun error occurred.
1 = An overrun error occurred.
FE—Framing Error
This bit indicates that a framing error (no Stop bit following data reception) was detected.
Reading the UART Receive Data register clears this bit.
PE
R
6
0
OE
R
5
0
FE
R
4
0
F41H
BRKD
R
3
0
Universal Asynchronous Receiver/Transmitter
Z8 Encore! XP
TDRE
R
2
1
Product Specification
(Table 63
TXE
R
1
1
®
F082A Series
and
Table
CTS
X
R
0
64)
111
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