ZGP323LSH4808C00TR Zilog, ZGP323LSH4808C00TR Datasheet - Page 47
![IC Z8 GP MCU 8K OTP 48SSOP](/photos/9/30/93008/269-48-ssop_sml.jpg)
ZGP323LSH4808C00TR
Manufacturer Part Number
ZGP323LSH4808C00TR
Description
IC Z8 GP MCU 8K OTP 48SSOP
Manufacturer
Zilog
Series
Z8® GP™r
Specifications of ZGP323LSH4808C00TR
Core Processor
Z8
Core Size
8-Bit
Speed
8MHz
Peripherals
HLVD, POR, WDT
Number Of I /o
32
Program Memory Size
8KB (8K x 8)
Program Memory Type
OTP
Ram Size
237 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
48-SSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
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ZGP323L
Product Specification
43
During PING-PONG Mode
The enable bits of T8 and T16 (CTR0, D7; CTR2, D7) are set and cleared alternately by
hardware. The timeout bits (CTR0, D5; CTR2, D5) are set every time the counter/timers
reach the terminal count.
Timer Output
The output logic for the timers is displayed in
Figure
27. P34 is used to output T8-OUT
when D0 of CTR0 is set. P35 is used to output the value of TI6-OUT when D0 of CTR2 is
set. When D6 of CTR1 is set, P36 outputs the logic combination of T8-OUT and T16-
OUT determined by D5 and D4 of CTR1.
Interrupts
The ZGP323L features six different interrupts (see
Table
11). The interrupts are maskable
and prioritized (see
Figure
28). The six sources are divided as follows: three sources are
claimed by Port 3 lines P33–P31, two by the counter/timers and one for low-voltage
detection. The Interrupt Mask Register (globally or individually) enables or disables the
six interrupt requests.
The source for IRQ is determined by bit 1 of the Port 3 mode register (P3M). When in
digital mode, Pin P33 is the source. When in analog mode the output of the Stop Mode
Recovery source logic is used as the source for the interrupt. See
Figure 33
on page 52.
PS023709-0208
Functional Description
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