ZGP323LAH2032G Zilog, ZGP323LAH2032G Datasheet - Page 15
![IC Z8 GP MCU 32K OTP 20SSOP](/photos/9/30/93032/269-20-ssop_sml.jpg)
ZGP323LAH2032G
Manufacturer Part Number
ZGP323LAH2032G
Description
IC Z8 GP MCU 32K OTP 20SSOP
Manufacturer
Zilog
Series
Z8® GP™r
Specifications of ZGP323LAH2032G
Core Processor
Z8
Core Size
8-Bit
Speed
8MHz
Peripherals
HLVD, POR, WDT
Number Of I /o
16
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Ram Size
237 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Other names
269-4407
ZGP323LAH2032G
ZGP323LAH2032G
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- Download datasheet (3Mb)
PS023709-0208
Notes:
Open-Drain
I/O
Out
In
Port 0 (P07–P00)
Port 0 is an 8-bit, bidirectional, CMOS-compatible port. These eight I/O lines are
configured under software control as a nibble I/O port. The output drivers are push-pull or
open-drain controlled by bit D2 in the PCON register.
If one or both nibbles are needed for I/O operation, they must be configured by writing to
the Port 0 mode register. After a hardware reset, Port 0 is configured as an input port.
An optional pull-up transistor is available as a mask option on all Port 0 bits with nibble
select.
1.
2.
Internal pull-ups are disabled on any given pin or group of port pins
when programmed into output mode.
The Port 0 direction is reset to be input following an SMR.
Z8 GP
OTP
Figure 7. Port 0 Configuration
4
4
Port 0 (I/O)
OTP Programming
Option
Product Specification
Pad
V
CC
Resistive
Transistor
Pull-up
Pin Description
ZGP323L
11
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