MC68HC711E20CFN3 Freescale Semiconductor, MC68HC711E20CFN3 Datasheet - Page 195
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MC68HC711E20CFN3
Manufacturer Part Number
MC68HC711E20CFN3
Description
IC MCU 3MHZ 20K OTP 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Specifications of MC68HC711E20CFN3
Core Processor
HC11
Core Size
8-Bit
Speed
3MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Size
20KB (20K x 8)
Program Memory Type
OTP
Eeprom Size
512 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Bootstrap mode can also be used to interactively calibrate critical analog sensors. Since this calibration
is done in the final assembled system, it can compensate for any errors in discrete interface circuitry and
cabling between the sensor and the analog inputs to the MCU. Note that this calibration routine is a
downloaded program that does not take up space in the normal application program.
Bootstrap Mode Logic
In the M68HC11 MCUs, very little logic is dedicated to the bootstrap mode. Consequently, this mode adds
almost no extra cost to the MCU system. The biggest piece of circuitry for bootstrap mode is the small
boot ROM. This ROM is 192 bytes in the original MC68HC11A8, but some of the newest members of the
M68HC11 Family, such as the MC68HC711K4, have as much as 448 bytes to accommodate added
features. Normally, this boot ROM is present in the memory map only when the MCU is reset in bootstrap
mode to prevent interference with the user’s normal memory space. The enable for this ROM is controlled
by the read boot ROM (RBOOT) control bit in the highest priority interrupt (HPRIO) register. The RBOOT
bit can be written by software whenever the MCU is in special test or special bootstrap modes; when the
MCU is in normal modes, RBOOT reverts to 0 and becomes a read-only bit. All other logic in the MCU
would be present whether or not there was a bootstrap mode.
Figure 1
including bootstrap mode. The active mode is determined by the mode A (MDA) and special mode
(SMOD) control bits in the HPRIO control register. These control bits are in turn controlled by the state of
the mode A (MODA) and mode B (MODB) pins during reset.
state of these pins during reset, the selected mode, and the state of the MDA, SMOD, and RBOOT control
bits. Refer to the composite memory map and information in
The MDA control bit is determined by the state of the MODA pin as the MCU leaves reset. MDA selects
between single-chip and expanded operating modes. When MDA is 0, a single-chip mode is selected,
either normal single-chip mode or special bootstrap mode. When MDA is 1, an expanded mode is
selected, either normal expanded mode or special test mode.
The SMOD control bit is determined by the inverted state of the MODB pin as the MCU leaves reset.
SMOD controls whether a normal mode or a special mode is selected. When SMOD is 0, one of the two
normal modes is selected, either normal single-chip mode or normal expanded mode. When SMOD is 1,
one of the two special modes is selected, either special bootstrap mode or special test mode. When either
special mode is in effect (SMOD = 1), certain privileges are in effect, for instance, the ability to write to the
mode control bits and fetching the reset and interrupt vectors from $BFxx rather than $FFxx.
Freescale Semiconductor
shows the composite memory map of the MC68HC711E9 in its four basic modes of operation,
MODB
1
0
0
0
Input Pins
MODA
0
0
0
1
Table 1. Mode Selection Summary
M68HC11 Bootstrap Mode, Rev. 1.1
Normal single chip
Normal expanded
Special bootstrap
Mode Selected
Special test
Table 1
Table 1
RBOOT
Control Bits in HPRIO
0
0
1
0
shows the relationship between the
for the following discussion.
SMOD
0
0
1
1
MDA
Bootstrap Mode Logic
0
1
0
1
195
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