MC68HC908JB8JP Freescale Semiconductor, MC68HC908JB8JP Datasheet - Page 163
MC68HC908JB8JP
Manufacturer Part Number
MC68HC908JB8JP
Description
IC MCU FLASH 8BIT 8K 20-DIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908JB8JDWE.pdf
(286 pages)
Specifications of MC68HC908JB8JP
Core Processor
HC08
Core Size
8-Bit
Speed
3MHz
Connectivity
USB
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
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Technical Data — MC68HC908JB8•MC68HC08JB8•MC68HC08JT8
10.1 Contents
10.2 Introduction
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
Freescale Semiconductor
10.2
10.3
10.4
10.4.1
10.4.2
10.4.3
10.4.4
10.4.5
10.4.6
10.5
This section describes the monitor ROM (MON) and the monitor mode
entry methods. The monitor ROM allows complete testing of the MCU
through a single-wire interface with host computer. This mode is also
used for programming and erasing of FLASH memory in the MCU.
Monitor mode entry can be achieved without use of the higher voltage,
V
thus reducing the hardware requirements for in-circuit programming.
DD
+ V
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164
Security. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .164
HI
Entering Monitor Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 166
Baud Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .169
Data Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170
Echoing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170
Break Signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171
Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171
, as long as vector addresses $FFFE and $FFFF are blank,
Monitor ROM (MON)
Section 10. Monitor ROM (MON)
Technical Data
163
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