MC9S12DP512CPV Freescale Semiconductor, MC9S12DP512CPV Datasheet - Page 2

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MC9S12DP512CPV

Manufacturer Part Number
MC9S12DP512CPV
Description
IC MCU 512K FLASH 25MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12DP512CPV

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
PWM, WDT
Number Of I /o
91
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.25 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Revision History
Freescale reserves the right to make changes without further notice to any products herein to improve reliability, function or
design.Freescale does not assume any liability arising out of the application or use of any product or circuit described herein;
neither does it convey any license under its patent rights nor the rights of others.Freescale products are not designed, intended,
or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to
support or sustain life, or for any other application in which the failure of the Freescale product could create a situation where
personal injury or death may occur. Should Buyer purchase or use Freescale products for any such unintended or unauthorized
application, Buyer shall indemnify and hold Freescale and its officers, employees, subsidiaries, affiliates, and distributors harmless
against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of
personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Freescale was
negligent regarding the design or manufacture of the part.
Number
Version
V01.00
V01.01
V01.02
V01.03
V01.04
V01.05
Revision
13 Mar
02 Apr
15 Apr
06 Jun
27 Nov
05 Jul
Date
2001
2002
2002
2002
2002
2002
Effective
11 Feb
13 Mar
02 Apr
15 Apr
06 Jun
05 Jul
Date
2002
2002
2002
2002
2002
2002
Author
- Initial version based on DP256 V2.09.
- Updated document formats.
- Removed reference to SIM in overview.
- Changed XCLKS to PE7 in signal description.
- Removed "Oscillator start-up time from POR or STOP" from Oscillator
Characterisitcs.
- Changed VDD and VDDPLL to 2.35V.
- Updated C
- Updated I
- Updated input capacitance.
- Updated NVM timing characteristics.
- Updated document reference (SPI, SCI).
- Corrected values in device memory map (RAM start, flash protected
sector sizes).
- Updated document reference (SCI).
- Changed all operating frequency references to 50MHz EXTAL and
removed references to 80 pin LQFP.
- Preface Table "Document References": Changed to full naming for
each block.
- Table "Interrupt Vector Locations", Column "Local Enable": Corrected
several register and bit names.
- Table "Signal Properties": Added column "Internal Pull Resistor".
- Table "PLL Characteristics": Updated parameters K1 and f1
- Figure "Basic Pll functional diagram": Inserted XFC pin in diagram
- Enhanced section "XFC Component Selection"
- Added to Sections ATD, ECT and PWM: freeze mode = active BDM
mode.
OL
INS
/I
OH
.
values.
Description of Changes
9S12DP512DGV1/D

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