COP8SDR9IMT8 National Semiconductor, COP8SDR9IMT8 Datasheet - Page 76
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COP8SDR9IMT8
Manufacturer Part Number
COP8SDR9IMT8
Description
IC MCU EEPROM 8BIT 32K 48-TSSOP
Manufacturer
National Semiconductor
Series
COP8™ 8Sr
Datasheet
1.COP8SCR9HVA8NOPB.pdf
(80 pages)
Specifications of COP8SDR9IMT8
Core Processor
COP8
Core Size
8-Bit
Speed
20MHz
Connectivity
Microwire/Plus (SPI), UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
39
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TSSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Other names
*COP8SDR9IMT8
www.national.com
21.0 Revision History
October 2000
March 2001
September 2001 General Description
January 2002
April 2002
February 2003
August 2003
Date
Throughout
General Description
Ordering Information
Electrical Specifications
Functional Description
In-System Programming Clarified use of high voltage on G6 pin to force execution from Boot ROM.
USART
Development Support
Connection Diagrams
Electrical Characteristics Added DC and AC Electrical for -40˚C to +125˚C temperature range.
USART
Development Support
Physical Dimensions
Forced Execution From
Boot ROM
Connection Diagrams
Pin Descriptions
Timers
Development Support
Pin Descriptions
Reset
Power Saving Features
Development Support
Section
Base revision for this history.
Various typographical errors.
Corrected I/O Pin count.
Reformatted Part Numbering Scheme table.
Reduced dynamic supply current specification.
Reduced input leakage current.
Clarified rise time restriction for high voltage on G6 pin.
Added general statement regarding specification limits.
Added table describing memory address ranges.
Clarified conditions causing erasure of the security bit.
Clarified interrupt activity when calling ISP routines in Boot ROM.
Corrected table references in baud rate calculation example.
Removed MetaLink office in Germany.
Corrected tools order information.
Updated I/O Pins, Packages and Temperature.
Added more packages, updated Pinouts table and Ordering Information.
Clarified RCVG Operation.
Updated with the latest support information.
Added more package drawings.
Added figure.
Removed erroneous ADCH references in Pinout Table.
Caution on GND connection on LLP package.
Clearification on high speed PWM Timer use.
Updated with the latest support information.
Clarification of the functions of L4 and L6 for T2 and T3 PWM Output.
Addition of caution regarding rising edge on RESET with low V
Description of modified function of ITMR Register.
Updated with the latest support information.
Released as final.
76
Summary of Changes
CC
.