COP8SBE9IMT9 National Semiconductor, COP8SBE9IMT9 Datasheet - Page 13

• Manufacturer Part Number: COP8SBE9IMT9
• Description: IC MCU EEPROM 8BIT 8K 48-TSSOP
• Manufacturer: National Semiconductor
• Series: COP8™ 8Sr

Specifications of COP8SBE9IMT9

• Core Processor: COP8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: Microwire/Plus (SPI), UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 48-TSSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Other names: *COP8SBE9IMT9

3.0 Pin Descriptions
The COP8SBE/SCE/SDE I/O structure enables designers to
reconfigure the microcontroller’s I/O functions with a single
instruction. Each individual I/O pin can be independently
configured as output pin low, output high, input with high
impedance or input with weak pull-up device. A typical ex-
ample is the use of I/O pins as the keyboard matrix input
lines. The input lines can be programmed with internal weak
pull-ups so that the input lines read logic high when the keys
are all open. With a key closure, the corresponding input line
will read a logic zero since the weak pull-up can easily be
overdriven. When the key is released, the internal weak
pull-up will pull the input line back to logic high. This elimi-
nates the need for external pull-up resistors. The high cur-
rent options are available for driving LEDs, motors and
speakers. This flexibility helps to ensure a cleaner design,
with less external components and lower costs. Below is the
general description of all available pins.
V
pins must be connected.
Users of the LLP package are cautioned to be aware that the
central metal area and the pin 1 index mark on the bottom of
the package may be connected to GND. See figure below:
CKI is the clock input. This can be connected (in conjunction
with CKO) to an external crystal circuit to form a crystal
oscillator. See Oscillator Description section.
RESET is the master reset input. See Reset description
section.
The device contains up to six bidirectional 8-bit I/O ports (A,
B, G, H and L), where each individual bit may be indepen-
dently configured as an input (Schmitt trigger inputs on ports
L and G), output or TRI-STATE under program control. Three
data memory address locations are allocated for each of
these I/O ports. Each I/O port has three associated 8-bit
memory mapped registers, the CONFIGURATION register,
the output DATA register and the Pin input register. (See the
memory map for the various addresses associated with the
I/O ports.) Figure 3 shows the I/O port configurations. The
DATA and CONFIGURATION registers allow for each port bit
to be individually configured under software control as
shown below:
CC
CONFIGURATION
and GND are the power supply pins. All V
Register
0
FIGURE 2.
Register
DATA
0
Hi-Z Input
(TRI-STATE Output)
20032770
Port Set-Up
CC
and GND
13
Port A is an 8-bit I/O port. All A pins have Schmitt triggers on
the inputs. The 44-pin packages do not have a full 8-bit port
and contain some unbonded, floating pads internally on the
chip. The binary value read from these bits is undetermined.
The application software should mask out these unknown
bits when reading the Port A register, or use only bit-access
program instructions when accessing Port A. These uncon-
nected bits draw power only when they are addressed (i.e.,
in brief spikes).
Port B is an 8-bit I/O port. All B pins have Schmitt triggers on
the inputs.
Port G is an 8-bit port. Pin G0, G2–G5 are bi-directional I/O
ports. Pin G6 is always a general purpose Hi-Z input. All pins
have Schmitt Triggers on their inputs. Pin G1 serves as the
dedicated WATCHDOG output with weak pull-up if the
WATCHDOG feature is selected by the Option register.
The pin is a general purpose I/O if WATCHDOG feature is
not selected. If WATCHDOG feature is selected, bit 1 of the
Port G configuration and data register does not have any
effect on Pin G1 setup. G7 serves as the dedicated output
pin for the CKO clock output.
Since G6 is an input only pin and G7 is the dedicated CKO
clock output pin, the associated bits in the data and configu-
ration registers for G6 and G7 are used for special purpose
functions as outlined below. Reading the G6 and G7 data
bits will return zeros.
The device will be placed in the HALT mode by writing a “1”
to bit 7 of the Port G Data Register. Similarly the device will
be placed in the IDLE mode by writing a “1” to bit 6 of the
Port G Data Register.
Writing a “1” to bit 6 of the Port G Configuration Register
enables the MICROWIRE/PLUS to operate with the alter-
nate phase of the SK clock. The G7 configuration bit, if set
high, enables the clock start up delay after HALT when the
R/C clock configuration is used.
Port G has the following alternate features:
G7 CKO Oscillator dedicated output
G6 SI (MICROWIRE/PLUS Serial Data Input)
G5 SK (MICROWIRE/PLUS Serial Clock)
G4 SO (MICROWIRE/PLUS Serial Data Output)
G3 T1A (Timer T1 I/O)
G2 T1B (Timer T1 Capture Input)
G1 WDOUT WATCHDOG and/or Clock Monitor if WATCH-
G0 INTR (External Interrupt Input)
G0 through G3 are also used for In-System Emulation.
Port H is an 8-bit I/O port. All H pins have Schmitt triggers on
the inputs.
Port L is an 8-bit I/O port. All L-pins have Schmitt triggers on
the inputs.
Port L supports the Multi-Input Wake-up feature on all eight
pins. Port L has the following alternate pin functions:
CONFIGURATION
DOG enabled, otherwise it is a general purpose I/O
G7
G6
Register
0
1
1
CLKDLY
Alternate SK
Config. Reg.
Register
DATA
1
0
1
Input with Weak Pull-Up
Push-Pull Zero Output
Push-Pull One Output
HALT
IDLE
Port Set-Up
Data Reg.
www.national.com