MC68HC908AP64CB Freescale Semiconductor, MC68HC908AP64CB Datasheet - Page 85

• Manufacturer Part Number: MC68HC908AP64CB
• Description: IC MCU 64K FLASH 8MHZ 42SDIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908AP64CB

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, IRSCI, SCI, SPI
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 30
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 42-DIP (0.600", 15.24mm)
• For Use With: DEMO908AP64E - BOARD DEMO FOR 908AP64DEMO908AP64 - BOARD DEMO FOR 908AP64
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Table 6-1
Freescale Semiconductor
5. Select the VCO’s power-of-two range multiplier E, according to this table:
6. Select a VCO linear range multiplier, L, where f
7. Calculate and verify the adequacy of the VCO programmed center-of-range frequency, f
8. Verify the choice of P, R, N, E, and L by comparing f
9. Program the PLL registers accordingly:
center-of-range frequency is the midpoint between the minimum and maximum frequencies
attainable by the PLL.
For proper operation,
operation, f
as possible to f
a. In the PRE bits of the PLL control register (PCTL), program the binary equivalent of P.
b. In the VPR bits of the PLL control register (PCTL), program the binary equivalent of E.
d. In the PLL VCO range select register (PMRS), program the binary coded equivalent of L.
e. In the PLL reference divider select register (PMDS), program the binary coded equivalent of
c. In the PLL multiplier select register low (PMSL) and the PLL multiplier select register high
provides numeric examples (numbers are in hexadecimal notation):
(PMSH), program the binary equivalent of N.
R.
Exceeding the recommended maximum bus frequency or VCO frequency
can crash the MCU.
The values for P, E, N, L, and R can only be programmed when the PLL is
off (PLLON = 0).
VCLK
VCLK.
must be within the application’s tolerance of f
NOTE: Do not program E to a value of 3.
19,660,800 ≤ f
9,830,400 ≤ f
MC68HC908AP Family Data Sheet, Rev. 4
0 < f
Frequency Range
VCLK
f
VRS
L
f
VCLK
VRS
VCLK
=
< 9,830,400
–
round
f
< 19,660,800
< 39,321,600
VCLK
=
NOTE
NOTE
(
L 2
⎛
⎜
⎝
×
--------------------------
2
≤
E
NOM
f
f
--------------------------
E
VCLK
×
NOM
)f
f
NOM
NOM
2
= 125kHz
VCLK
×
⎞
⎟
⎠
2
E
to f
VRS
VCLKDES
and f
E
0
1
2
, and f
VCLKDES
VRS
Functional Description
. For proper
must be as close
VRS
. The
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