MPC564MZP66 Freescale Semiconductor, MPC564MZP66 Datasheet
MPC564MZP66
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MPC564MZP66 Summary of contents
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... Freescale Semiconductor, Inc. Product Brief MPC561PB/D Rev. 2, 2/2003 MPC561/MPC563 Product Brief This document provides an overview of the MPC561/MPC563 microcontroller, including a block diagram showing the major modular components, sections that list the major features, and differences between the MPC561/MPC563 and the MPC555. The MPC561, MPC562, MPC563, and MPC564 devices are members of the Motorola MPC500 RISC Microcontroller family ...
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... Freescale Semiconductor, Inc. Block Diagram • One queued serial multi-channel module (QSMCM), which contains one queued serial peripheral interface (QSPI) and two serial controller interfaces (SCI/UART) • One peripheral pin multiplexing module (PPM) with a parallel to serial driver • Debug features: — Nexus debug port (Level 3) — ...
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... Freescale Semiconductor, Inc. JTAG Burst Buffer Controller MPC5xx Core + FPU 32-Kbyte CALRAM 28-Kbyte SRAM (No Overlay) 4-Kbyte Overlay QADC64E QADC64E 8-Kbyte TPU3 DPTRAM *NOTE: Available on MPC563 only. Figure 1. MPC561/MPC563 Block Diagram 1.2 Key Features The MPC561/MPC563 key features are explained in the following sections. ...
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... Freescale Semiconductor, Inc. Key Features 1.2.1.1 RISC MCU Central Processing Unit (RCPU) • 32-bit single issue PowerPC core • Precise exception model • 64-bit floating point unit (FPU) • Code compression supported on MPC562/ MPC564 — Reduces usage of internal/external Flash memory (up to 50% for code) — ...
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... Freescale Semiconductor, Inc. 1.2.1.4 Flexible Memory Protection Unit • Flexible memory protection units (MPU) in BBC and L2U • Default attributes available in one global entry • Attribute support for speculative accesses • eight memory regions are supported, four for data and four for instructions 1 ...
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... Freescale Semiconductor, Inc. Key Features 1.2.2 Nexus Debug Port (Class 3) • Compliant with Class 3 of the IEEE-ISTO 5001-1999 • Program trace via branch trace messaging (BTM) • Data trace via data write messaging (DWM) and data read messaging (DRM) • Ownership trace via ownership trace messaging (OTM) • ...
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... Freescale Semiconductor, Inc. • Automated queue modes initiated by: — External edge trigger — Software command — Periodic/interval timer within QADC64E module, that can be assigned to both queue 1 and 2 — External gated trigger (queue 1 only) • 64 result registers — Output data is right- or left-justified, signed or unsigned. ...
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... Freescale Semiconductor, Inc. MPC561/MPC563 Optional Features 1.2.3.6 Peripheral Pin Multiplexing (PPM) • Synchronous serial interface between the microprocessor and an external device • Four internal parallel data sources can be multiplexed through the PPM — TPU3 A: 16 channels — TPU3 B: 16 channels — MIOS14: 12 PWM channels, four MDA channels — ...
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... Freescale Semiconductor, Inc. Table 2. Differences Between MPC555 and MPC561/MPC563 (continued) Module READI UIMB QADC64 QSMCM MIOS TouCAN TPU3 DPTRAM PPM 2.1 Additional MPC561/MPC563 Differences • MPC561/MPC563 are very similar to the MPC555 with the following differences: — MHz — CDR3 technology — Two power supplies: 5.0-V I/O, 2.6-V external bus pins, 2.6-V internal logic — ...
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... Freescale Semiconductor, Inc. Additional MPC561/MPC563 Differences • READI — New module • USIU — Enhanced interrupt controller — ENGCLK default frequency — READI support — Reduced data setup time — Enhanced external burst support • MIOS14 — Four additional PWM channels — ...
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... Freescale Semiconductor, Inc. first eight 4-Mbyte memory blocks starting with address 0x0000 0000 (refer to Figure 3). The programmability of the internal memory map location allows the user to implement a multiple-chip system. 0x0000 0000 0x003F FFFF 0x0040 0000 0x007F FFFF 0x0080 0000 0x00BF FFFF 0x00C0 0000 ...
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... Freescale Semiconductor, Inc. Additional MPC561/MPC563 Differences 0x00 0000 UC3F Flash* 512 Kbytes 0x07 FFFF 0x08 0000 Reserved for Flash 2,605 Kbytes 0x2F 7FFF BBC DECRAM 2 Kbytes 0x2F 8000 Reserved for BBC 0x2F 8800 0x2F A000 BBC CONTROL 0x2F BFFF 0x2F C000 USIU & ...
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... Freescale Semiconductor, Inc. 5 MPC561/MPC563 Pinout Diagram Figure 5 shows the pinout for the MPC561/MPC563 VDD VSS VSS VSS A_TPUCH VSSA A_TPUCH3 A_TPUCH7 11 A_TPUCH15 A_TPUCH B VSS VDD VSS VSS A_TPUCH2 A_TPUCH6 A_TPUCH14 VSSA 10 A_TPUCH C VSS VSS VDD VSS A_TPUCH1 A_TPUCH4 A_TPUCH12 NVDDL 8 A_TPUCH ...
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... Freescale Semiconductor, Inc. Additional MPC561/MPC563 Differences 6 Supporting Documentation List This list contains references to currently available and planned documentation. • MPC555 User’s Manual (MPC555UM/AD) • MPC561/MPC563 Reference Manual MPC561RM/D • RCPU Reference Manual (RCPURM/AD) • Nexus Standard Specification (non-Motorola document) • ...
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... Freescale Semiconductor, Inc. THIS PAGE INTENTIONALLY LEFT BLANK MOTOROLA For More Information On This Product, Additional MPC561/MPC563 Differences MPC561/MPC563 Product Brief Go to: www.freescale.com 15 ...
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... HOME PAGE: http://www.motorola.com/semiconductors Freescale Semiconductor, Inc. Information in this document is provided solely to enable system and software implementers to use Motorola products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. ...