C8051F001 Silicon Laboratories Inc, C8051F001 Datasheet - Page 83
C8051F001
Manufacturer Part Number
C8051F001
Description
IC 8051 MCU 32K FLASH 48TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F00xr
Specifications of C8051F001
Core Processor
8051
Core Size
8-Bit
Speed
20MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TQFP, 48-VQFP
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SMBus, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
16 bit
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
On-chip Dac
12 bit, 2 Channel
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No
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83
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
Bit7:
Bit6:
Bit5:
Bit4:
Bit3:
Bit2:
Bit1:
Bit0:
PCP1R
R/W
Bit7
This bit sets the priority of the CP1 interrupt.
0: CP1 rising interrupt set to low priority level.
1: CP1 rising interrupt set to high priority level.
This bit sets the priority of the CP1 interrupt.
0: CP1 falling interrupt set to low priority level.
1: CP1 falling interrupt set to high priority level.
This bit sets the priority of the CP0 interrupt.
0: CP0 rising interrupt set to low priority level.
1: CP0 rising interrupt set to high priority level.
This bit sets the priority of the CP0 interrupt.
0: CP0 falling interrupt set to low priority level.
1: CP0 falling interrupt set to high priority level.
PPCA0: Programmable Counter Array (PCA0) Interrupt Priority Control.
This bit sets the priority of the PCA0 interrupt.
0: PCA0 interrupt set to low priority level.
1: PCA0 interrupt set to high priority level.
PWADC0: ADC0 Window Comparator Interrupt Priority Control.
This bit sets the priority of the ADC0 Window interrupt.
0: ADC0 Window interrupt set to low priority level.
1: ADC0 Window interrupt set to high priority level.
This bit sets the priority of the SMBus interrupt.
0: SMBus interrupt set to low priority level.
1: SMBus interrupt set to high priority level.
This bit sets the priority of the SPI0 interrupt.
0: SPI0 interrupt set to low priority level.
1: SPI0 interrupt set to high priority level.
PCP1R: Comparator 1 (CP1) Rising Interrupt Priority Control.
PCP1F: Comparator 1 (CP1) Falling Interrupt Priority Control.
PCP0R: Comparator 0 (CP0) Rising Interrupt Priority Control.
PCP0F: Comparator 0 (CP0) Falling Interrupt Priority Control.
PSMB0: SMBus 0 Interrupt Priority Control.
PSPI0: Serial Peripheral Interface 0 Interrupt Priority Control.
PCP1F
R/W
Bit6
Figure 10.13. EIP1: Extended Interrupt Priority 1
PCP0R
R/W
Bit5
PCP0F
R/W
Bit4
Rev. 1.7
PPCA0
R/W
Bit3
PWADC0
R/W
Bit2
PSMB0
R/W
Bit1
PSPI0
R/W
Bit0
SFR Address:
Reset Value
00000000
0xF6