MC68HC711K4CFN4 Freescale Semiconductor, MC68HC711K4CFN4 Datasheet - Page 28

• Manufacturer Part Number: MC68HC711K4CFN4
• Description: IC MCU 24K OTP 4MHZ 84-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC711K4CFN4

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 62
• Program Memory Size: 24KB (24K x 8)
• Program Memory Type: OTP
• Eeprom Size: 640 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

PGAR — Port G Assignment
Bits [7:6] — Not implemented
PGAR[5:0] —Port G Pin Assignment Bits [5:0]
MMSIZ — Memory Mapping Size
MXGS[2:1] — Memory Expansion Select for General-Purpose Chip Select 2 or 1
W2SZ[1:0] — Window 2 Size
Bits [3:2] — Not implemented
28
MOTOROLA
RESET:
RESET:
Number of Banks
Always read zero
These bits select the size of memory expansion window 2. Refer to the table following W1SZ[1:0].
Always read zero
0 = Corresponding port G pin is general-purpose I/O
1 = Corresponding port G pin is address line, XA[18:13]
0 = General-purpose chip select 2 or 1 based on 64 Kbyte CPU address
1 = General-purpose chip select 2 or 1 based on expansion address
16
32
64
2
4
8
MXGS2
Bit 7
Bit 7
—
0
0
A special case exists for expansion address lines XA[15:13] that overlap the CPU
address lines ADDR[15:13]. If these lines are selected as expansion address lines
in PGAR, but are not used in either window, the corresponding CPU address line
is output on the appropriate port G pin.
MXGS1
Table 5 CPU Address and Address Expansion Signals
—
6
0
6
0
ADDR[12:0]
ADDR[12:0]
ADDR[12:0]
ADDR[12:0]
ADDR[12:0]
ADDR[12:0]
Freescale Semiconductor, Inc.
XA[14:13]
XA[15:13]
XA[16:13]
XA[17:13]
XA[18:13]
8 Kbytes
XA13
For More Information On This Product,
PGAR5
W2SZ1
5
0
5
0
Go to: www.freescale.com
PGAR4
W2SZ0
4
0
4
0
ADDR[13:0]
ADDR[13:0]
ADDR[13:0]
ADDR[13:0]
ADDR[13:0]
16 Kbytes
XA[15:14]
XA[16:14]
XA[17:14]
XA[18:14]
NOTE
XA14
—
—
PGAR3
Window Size
—
0
0
3
3
PGAR2
—
ADDR[14:0]
ADDR[14:0]
ADDR[14:0]
ADDR[14:0]
2
0
2
0
32 Kbytes
XA[16:15]
XA[17:15]
XA[18:15]
XA15
—
—
—
—
PGAR1
W1SZ1
1
0
1
0
(Window Based at
PGAR0
W1SZ0
M68HC11 K Series
$002D
$0056
MC68HC11KTS/D
Bit 0
Bit 0
ADDR[13:0]
ADDR[13:0]
ADDR[13:0]
ADDR[13:0]
32 Kbytes
XA[15:14]
XA[16:14]
XA[17:14]
XA[18:14]
0
0
$4000)
—
—
—
—