C8051F131 Silicon Laboratories Inc, C8051F131 Datasheet - Page 138

• Manufacturer Part Number: C8051F131
• Description: IC 8051 MCU 128K FLASH 64TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F13xr

Specifications of C8051F131

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 32
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8.25K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: 336-1148

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
11.2.6.3.SFR Page Stack Example
The following is an example that shows the operation of the SFR Page Stack during interrupts.
In this example, the SFR Page Control is left in the default enabled state (i.e., SFRPGEN = 1), and the
CIP-51 is executing in-line code that is writing values to Port 5 (SFR “P5”, located at address 0xD8 on SFR
Page 0x0F). The device is also using the Programmable Counter Array (PCA) and the 10-bit ADC (ADC2)
window comparator to monitor a voltage. The PCA is timing a critical control function in its interrupt service
routine (ISR), so its interrupt is enabled and is set to high priority. The ADC2 is monitoring a voltage that is
less important, but to minimize the software overhead its window comparator is being used with an associ-
ated ISR that is set to low priority. At this point, the SFR page is set to access the Port 5 SFR (SFRPAGE =
0x0F). See Figure 11.5 below.
SFR Page
Stack SFR's
0x0F
SFRPAGE
(Port 5)
SFRNEXT
SFRLAST
Figure 11.5. SFR Page Stack While Using SFR Page 0x0F To Access Port 5
While CIP-51 executes in-line code (writing values to Port 5 in this example), ADC2 Window Comparator
Interrupt occurs. The CIP-51 vectors to the ADC2 Window Comparator ISR and pushes the current SFR
Page value (SFR Page 0x0F) into SFRNEXT in the SFR Page Stack. The SFR page needed to access
ADC2’s SFR’s is then automatically placed in the SFRPAGE register (SFR Page 0x02). SFRPAGE is con-
sidered the “top” of the SFR Page Stack. Software can now access the ADC2 SFR’s. Software may switch
to any SFR Page by writing a new value to the SFRPAGE register at any time during the ADC2 ISR to
access SFR’s that are not on SFR Page 0x02. See Figure 11.6 below.
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