M30280F6HP#U5 Renesas Electronics America, M30280F6HP#U5 Datasheet - Page 185
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M30280F6HP#U5
Manufacturer Part Number
M30280F6HP#U5
Description
IC M16C MCU FLASH 48K 80LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/28r
Specifications of M30280F6HP#U5
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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M
R
R
13.6 I/O Port Function Select
1
e
E
Table 13.11 Pin setting for Time Measurement and Waveform Generating Functions
. v
6
J
OUTC1
OUTC1
OUTC1
OUTC1
OUTC1
OUTC1
OUTC1
OUTC1
P2
P2
P2
P2
P2
P2
P2
P2
The value in the G1FE and G1FS registers decides which IC/OC pin to be an input or output pin.
In SR waveform generating mode, two channels, a set of even channel and odd channel, are used every
output waveform, however, the waveform is output from an even channel only. In this case, the correspond-
ing pin to the odd channel can be used as an I/O port.
C
0
2
9
2 /
7
6
5
4
3
2
1
0
Pin
0 .
B
/INPC1
/INPC1
/INPC1
/INPC1
/INPC1
/INPC1
/INPC1
/INPC1
8
0
0
0
IFE: IFEj (j=0 to 7) bits in the G1FE register.
FSC: FSCj (j=0 to 7) bits in the G1FS register.
MOD2 to MOD1: Bits in the G1POCRj (j=0 to 7) register.
G
4
7
6
5
4
3
2
1
0
J
7
a
o r
0 -
. n
u
7
6
5
4
3
2
1
0
2
/
/
/
/
/
/
/
/
p
3
0
, 1
0
(
M
IFE FSC MOD1 MOD0 Port Direction
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
2
1
0
0
6
7
C
2 /
X
X
X
X
X
X
X
X
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
page 163
, 8
M
1
6
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
C
2 /
f o
8
3
) B
8
5
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
Determined by PD2
Determined by PD2
Single-phase Waveform Output
Determined by PD2
Phase-delayed Waveform Output
Determined by PD2
Determined by PD2
Single-phase Waveform Output
SR Waveform Output
Phase-delayed Waveform Output
Determined by PD2
Determined by PD2
Single-phase Waveform Output
Determined by PD2
Phase-delayed Waveform Output
Determined by PD2
Determined by PD2
Single-phase Waveform Output
SR Waveform Output
Phase-delayed Waveform Output
Determined by PD2
Determined by PD2
Single-phase Waveform Output
Determined by PD2
Phase-delayed Waveform Output
Determined by PD2
Determined by PD2
Single-phase Waveform Output
SR Waveform Output
Phase-delayed Waveform Output
Determined by PD2
Determined by PD2
Single-phase Waveform Output
Determined by PD2
Phase-delayed Waveform Output
Determined by PD2
Determined by PD2
Single-phase Waveform Output
SR Waveform Output
Phase-delayed Waveform Output
7
7
7
6
6
5
5
5
4
4
3
3
3
2
2
1
1
1
0
0
, Input to INPC1
, SR Waveform Output mode
, Input to INPC1
, Input to INPC1
, SR Waveform Output mode
, Input to INPC1
, Input to INPC1
, SR Waveform Output mode
, Input to INPC1
, Input to INPC1
, SR Waveform Output mode
, Input to INPC1
7
6
5
4
3
1
0
2
is always active P2
is always active P2
is always active P2
is always active P2
is always active P2
is always active P2
is always active P2
is always active P2
Port Data
P2
OUTC1
P2
OUTC1
P2
OUTC1
OUTC1
OUTC1
P2
OUTC1
P2
OUTC1
P2
OUTC1
OUTC1
OUTC1
P2
OUTC1
P2
OUTC1
P2
OUTC1
OUTC1
OUTC1
P2
OUTC1
P2
OUTC1
P2
OUTC1
OUTC1
OUTC1
7
7 or
7
6
6 or
5
5 or
5
4
4 or
3
3 or
3
2
2 or
1
1 or
1
0
0 or
13. Timer S
INPC1
INPC1
INPC1
INPC1
INPC1
INPC1
INPC1
INPC1
7
7
6
6
6
5
5
4
4
4
3
3
2
2
2
1
1
0
0
0
7
6
5
4
3
2
1
0
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