M30624FGPFP#U5C Renesas Electronics America, M30624FGPFP#U5C Datasheet - Page 46

IC M16C MCU FLASH 256K 100QFP

M30624FGPFP#U5C

Manufacturer Part Number
M30624FGPFP#U5C
Description
IC M16C MCU FLASH 256K 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheets

Specifications of M30624FGPFP#U5C

Core Processor
M16C/60
Core Size
16-Bit
Speed
24MHz
Connectivity
I²C, IEBus, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-QFP
For Use With
R0K33062PS001BE - R0K33062P STARTER KITR0K33062PS000BE - KIT EVAL STARTER FOR M16C/62P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Chapter 2 Addressing Modes
R2R0
R3R1
A1A0
Control register direct
INTBL
INTBH
ISP
SP
SB
FB
FLG
32-bit register direct
The 32-bit concatenated register content of two
specified registers is the object to be operated
on.
This addressing can be used in SHL, SHA,
JMPI, and JSRI instructions.
The following lists the register and instruction
combinations that can be used.
R2R0, R3R1
A1A0
The specified control register is the
object to be operated on.
This addressing can be used in LDC,
STC, PUSHC, and POPC instructions.
If you specify SP, the stack pointer
indicated by the U flag is the object to
be operated on.
structions
SHL, SHA, JMPI, and JSRI in-
JMPI and JSRI instructions
28
INTBL
INTBH
ISP
USP
SB
FB
FLG
SHL, SHA instructions
R2R0
R3R1
JMPI, JSRI instructions
R2R0
R3R1
A1A0
b31
PC
b31
2.4 Special Instruction Addressing
b15
b15
b15
b15
b15
b15
b15
b16
b16
b15
Register
b15
b4 b3
b0
b0
b0
b0
b0
b0
b0
b0
b0

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