MCHC908JK1MPE Freescale Semiconductor, MCHC908JK1MPE Datasheet - Page 103

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MCHC908JK1MPE

Manufacturer Part Number
MCHC908JK1MPE
Description
IC MCU 1.5K FLASH 20-PDIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MCHC908JK1MPE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LED, LVD, POR, PWM
Number Of I /o
14
Program Memory Size
1.5KB (1.5K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
20-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
9.1 Contents
9.2 Introduction
MC68H(R)C908JL3
Freescale Semiconductor
Technical Data — MC68H(R)C908JL3
Rev. 1.1
9.2
9.3
9.4
9.4.1
9.4.2
9.4.3
9.4.4
9.4.5
9.4.6
9.5
This section describes the monitor ROM (MON) and the monitor mode
entry methods. The monitor ROM allows complete testing of the MCU
through a single-wire interface with a host computer. This mode is also
used for programming and erasing of FLASH memory in the MCU.
Monitor mode entry can be achieved without use of the higher test
voltage, V
blank, thus reducing the hardware requirements for in-circuit
programming.
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .102
Security. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
Entering Monitor Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
Baud Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .107
Data Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
Echoing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
Break Signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
DD
+ V
Monitor ROM (MON)
HI
, as long as vector addresses $FFFE and $FFFF are
Section 9. Monitor ROM (MON)
Technical Data
101

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