R5F21237JFP#U0 Renesas Electronics America, R5F21237JFP#U0 Datasheet - Page 370
R5F21237JFP#U0
Manufacturer Part Number
R5F21237JFP#U0
Description
IC R8C/23 MCU FLASH 48LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/23r
Datasheet
1.R5F21237DFPU0.pdf
(551 pages)
Specifications of R5F21237JFP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
CAN, I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
For Use With
RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F21237JFP#U0R5F21237JFP
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
R5F21237JFP#U0R5F21237JFP#ES
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
R5F21237JFP#U0R5F21237JFP#U1
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
Figure 16.44
16.3.5
The state of the SCL and SDA pins are routed through the noise rejection circuit before being latched internally.
Figure 16.44 shows the Block Diagram of Noise Canceller.
The noise rejection circuit consists of two cascaded latch and match detector circuits. When the SCL pin input
signal (or SDA pin input signal) is sampled on f1 and 2 latch outputs match, the level is passed forward to the
next circuit. When they do not match, the former value is retained.
f1 (sampling clock)
Noise Canceller
SCL or SDA
input signal
Block Diagram of Noise Canceller
Page 348 of 501
f1 (sampling clock)
Period of f1
D
Latch
C
Q
D
Latch
C
Q
16. Clock Synchronous Serial Interface
detection
Match
circuit
Internal SCL
or SDA signal
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