MC9S08GT16CFDER Freescale Semiconductor, MC9S08GT16CFDER Datasheet - Page 58
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MC9S08GT16CFDER
Manufacturer Part Number
MC9S08GT16CFDER
Description
IC MCU 16K FLASH 1K RAM 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.M68EVB908GB60E.pdf
(290 pages)
Specifications of MC9S08GT16CFDER
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN
For Use With
M68DEMO908GB60E - BOARD DEMO MC9S08GB60M68EVB908GB60E - BOARD EVAL FOR MC9S08GB60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Chapter 4 Memory
4.6.5
Bits 3, 1, and 0 always read 0 and writes have no meaning or effect. The remaining five bits are status bits
that can be read at any time. Writes to these bits have special meanings that are discussed in the bit
descriptions.
FCBEF — FLASH Command Buffer Empty Flag
FCCF — FLASH Command Complete Flag
FPVIOL — Protection Violation Flag
FACCERR — Access Error Flag
58
The FCBEF bit is used to launch commands. It also indicates that the command buffer is empty so that
a new command sequence can be executed when performing burst programming. The FCBEF bit is
cleared by writing a 1 to it or when a burst program command is transferred to the array for
programming. Only burst program commands can be buffered.
FCCF is set automatically when the command buffer is empty and no command is being processed.
FCCF is cleared automatically when a new command is started (by writing 1 to FCBEF to register a
command). Writing to FCCF has no meaning or effect.
FPVIOL is set automatically when FCBEF is cleared to register a command that attempts to erase or
program a location in a protected block (the erroneous command is ignored). FPVIOL is cleared by
writing a 1 to FPVIOL.
FACCERR is set automatically when the proper command sequence is not followed exactly (the
erroneous command is ignored), if a program or erase operation is attempted before the FCDIV register
has been initialized, or if the MCU enters stop while a command was in progress. For a more detailed
discussion of the exact actions that are considered access errors, see
FACCERR is cleared by writing a 1 to FACCERR. Writing a 0 to FACCERR has no meaning or effect.
1 = A new burst program command may be written to the command buffer.
0 = Command buffer is full (not ready for additional commands).
1 = All commands complete
0 = Command in progress
1 = An attempt was made to erase or program a protected location.
0 = No protection violation.
1 = An access error has occurred.
0 = No access error has occurred.
FLASH Status Register (FSTAT)
Reset:
Read:
Write:
FCBEF
Bit 7
1
Figure 4-8. FLASH Status Register (FSTAT)
= Unimplemented or Reserved
MC9S08GB/GT Data Sheet, Rev. 2.3
FCCF
6
1
FPVIOL FACCERR
5
0
4
0
3
0
0
Section 4.4.5, “Access
FBLANK
2
0
Freescale Semiconductor
1
0
0
Bit 0
0
0
Errors.”
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