MCR908JL3EMDWE Freescale Semiconductor, MCR908JL3EMDWE Datasheet - Page 49

• Manufacturer Part Number: MCR908JL3EMDWE
• Description: IC MCU 4K FLASH 8MHZ 28-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCR908JL3EMDWE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 23
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -

Chapter 5
System Integration Module (SIM)
5.1 Introduction
This section describes the system integration module (SIM), which supports up to 24 external and/or
internal interrupts. Together with the CPU, the SIM controls all MCU activities. A block diagram of the SIM
is shown in
controller that coordinates CPU and exception timing. The SIM is responsible for:
Table 5-1
Freescale Semiconductor
•
•
•
•
•
Bus clock generation and control for CPU and peripherals
–
–
Master reset control, including power-on reset (POR) and COP timeout
Interrupt control:
–
–
–
CPU enable/disable timing
Modular architecture expandable to 128 interrupt sources
Signal Name
2OSCOUT
OSCOUT
PORRST
shows the internal signal names used in this section.
IRST
Stop/wait/reset/break entry and recovery
Internal clock control
Acknowledge timing
Arbitration control timing
Vector address generation
R/W
IAB
IDB
Figure
5-1.
Buffered clock from the X-tal oscillator circuit or the RC oscillator circuit.
The 2OSCOUT frequency divided by two. This signal is again divided by two in the SIM to
generate the internal bus clocks. (Bus clock = 2OSCOUT ÷ 4)
Internal address bus
Internal data bus
Signal from the power-on reset module to the SIM
Internal reset signal
Read/write signal
Figure 5-2
Table 5-1. Signal Name Conventions
MC68HC908JL3E Family Data Sheet, Rev. 4
is a summary of the SIM I/O registers. The SIM is a system state
Description
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