R5F21236JFP#U0 Renesas Electronics America, R5F21236JFP#U0 Datasheet - Page 220
![IC R8C/23 MCU FLASH 48LQFP](/photos/28/61/286102/48-lqfp__plqp0048kb-a_sml.jpg)
R5F21236JFP#U0
Manufacturer Part Number
R5F21236JFP#U0
Description
IC R8C/23 MCU FLASH 48LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/23r
Datasheet
1.R5F21237DFPU0.pdf
(551 pages)
Specifications of R5F21236JFP#U0
Core Processor
R8C
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
For Use With
RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F21236JFP#U0R5F21236JFP
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
R5F21236JFP#U0R5F21236JFP#U1
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
R5F21236JFP#U0R5F21236JFP#U1
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
Figure 14.50
Timer RD Function Control Register
b7 b6 b5 b4
NOTES:
1
1.
2. When bits CMD1 to CMD0 are set to 00b (timer mode, PWM mode, or PWM3 mode), the setting of the PWM3 bit is
Set bits CMD1 to CMD0 w hen both the TSTART0 and TSTART1 bits in the TRDSTR register are set to 0 (count stops).
enabled.
b3 b2
TRDFCR Register in Output Compare Function
b1 b0
0 0
Bit Symbol
TRDFCR
ADTRG
Symbol
STCLK
ADEG
PWM3
CMD0
CMD1
OLS0
OLS1
Page 198 of 501
Combination mode selection bit
Normal-phase output level selection
bit (in reset synchronous PWM mode
or complementary PWM mode)
Counter-phase output level selection
bit (in reset synchronous PWM mode
or complementary PWM mode)
A/D trigger enable bit
(in complementary PWM mode)
A/D trigger edge selection bit
(in complementary PWM mode)
External clock input selection bit
PWM3 mode selection bit
Address
Bit Name
013Ah
(2)
(1)
Set to 00b (timer mode, PWM mode, or
PWM3 mode) in the output compare
function.
This bit is disabled in the output compare
function.
This bit is disabled in the output compare
function.
This bit is disabled in the output compare
function.
This bit is disabled in the output compare
function.
0 : External clock input disabled
1 : External clock input enabled
Set this bit to 1 (other than PWM3 mode) in
the output compare function.
After Reset
10000000b
Function
14. Timers
RW
RW
RW
RW
RW
RW
RW
RW
RW
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