C8051F531-IT Silicon Laboratories Inc, C8051F531-IT Datasheet - Page 51
![IC 8051 MCU 8K FLASH 20TSSOP](/photos/12/46/124608/silicon_laboratories_inc-20-tssop_sml.jpg)
C8051F531-IT
Manufacturer Part Number
C8051F531-IT
Description
IC 8051 MCU 8K FLASH 20TSSOP
Manufacturer
Silicon Laboratories Inc
Series
C8051F53xr
Specifications of C8051F531-IT
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.25 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-TSSOP
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
16
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.25 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
336-1393
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F531-IT
Manufacturer:
SILICON
Quantity:
205
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Table 3.9. QFN-20 Landing Diagram Dimensions
Notes:
General
Solder Mask Design
Stencil Design
Card Assembly
1. All dimensions shown are in millimeters (mm) unless otherwise
2. This land pattern design is based on the IPC-7351 guidelines.
3. All metal pads are to be non-solder mask defined (NSMD).
4. A stainless steel, laser-cut and electro-polished stencil with
5. The stencil thickness should be 0.125 mm (5 mils).
6. The ratio of stencil aperture to land pad size should be 1:1 for all
7. A 2x2 array of 1.10 x 1.10 mm openings on 1.30 mm pitch should be
8. A No-Clean, Type-3 solder paste is recommended.
9. The recommended card reflow profile is per the JEDEC/IPC J-STD-
Symbol
noted.
Clearance between the solder mask and the metal pad is to be
60 µm minimum, all the way around the pad.
trapezoidal walls should be used to assure good solder paste
release.
perimeter pads.
used for the center ground pad.
020 specification for Small Body Components.
C1
C2
X1
X2
Y1
Y2
E
C8051F52x/F52xA/F53x/F53xA
Rev. 1.3
3.90
3.90
0.20
2.75
0.65
2.75
Min
0.50 BSC.
Max
4.00
4.00
0.30
2.85
0.75
2.85
51
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