MC68HC705C8AVFNE Freescale Semiconductor, MC68HC705C8AVFNE Datasheet - Page 91
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MC68HC705C8AVFNE
Manufacturer Part Number
MC68HC705C8AVFNE
Description
IC MCU 8BIT 44-PLCC
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet
1.MC68HC705C8AB.pdf
(222 pages)
Specifications of MC68HC705C8AVFNE
Core Processor
HC05
Core Size
8-Bit
Speed
2.1MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
24
Program Memory Size
8KB (8K x 8)
Program Memory Type
OTP
Ram Size
304 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68HC705C8AVFNE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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MC68HC705C8A — Rev. 3
MOTOROLA
$0012
$0013
$0014
$0015
$0016
$0017
$0018
$0019
$001A
$001B
Addr.
Output Compare Register
Output Compare Register
Alternate Timer Register
Alternate Timer Register
Timer Control Register
Input Capture Register
Input Capture Register
Timer Status Register
Timer Register High
Timer Register Low
Register Name
See page 100.
See page 100.
See page 101.
See page 101.
See page 94.
See page 96.
High (OCRH)
See page 97.
See page 97.
See page 99.
See page 99.
High (ATRH)
Low (OCRL)
High (ICRH)
Low (ATRL)
Low (ICRL)
(TCR)
(TRH)
(TSR)
(TRL)
Figure 8-2. Timer I/O Register Summary
Freescale Semiconductor, Inc.
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
For More Information On This Product,
Read:
Read:
Read: Bit 15
Read:
Read:
Read:
Read: Bit 15
Read:
Read: Bit 15
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Bit 15
Bit 7
ICIE
Bit 7
Bit 7
Bit 7
Bit 7
ICF
Go to: www.freescale.com
U
0
Capture/Compare Timer
= Unimplemented
Bit 14
Bit 14
Bit 14
Bit 14
OCIE
OCF
Bit 6
Bit 6
Bit 6
Bit 6
U
6
0
Bit 13
Bit 13
Bit 13
Bit 13
TOIE
TOF
Bit 5
Bit 5
Bit 5
Bit 5
U
5
0
Reset initializes ATRH to $FF
Reset initializes ATRL to $FC
Reset initializes TRH to $FF
Reset initializes TRL to $FC
U = Unaffected
Bit 12
Unaffected by reset
Unaffected by reset
Bit 12
Unaffected by reset
Unaffected by reset
Bit 12
Bit 12
Bit 4
Bit 4
Bit 4
Bit 4
4
0
0
0
0
Bit 11
Bit 11
Bit 11
Bit 11
Bit 3
Bit 3
Bit 3
Bit 3
3
0
0
0
0
Bit 10
Bit 10
Bit 10
Bit 10
Capture/Compare Timer
Bit 2
Bit 2
Bit 2
Bit 2
2
0
0
0
0
Timer Operation
IEDG
Bit 9
Bit 1
Bit 9
Bit 1
Bit 9
Bit 1
Bit 9
Bit 1
Technical Data
U
1
0
0
OLVL
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
0
0
0
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