MC9S08DV60CLF Freescale Semiconductor, MC9S08DV60CLF Datasheet - Page 224
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MC9S08DV60CLF
Manufacturer Part Number
MC9S08DV60CLF
Description
IC MCU 60K FLASH 3K RAM 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Specifications of MC9S08DV60CLF
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S08DV60CLF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Chapter 12 Freescale’s Controller Area Network (S08MSCANV1)
12.3.2
The CANCTL1 register provides various control bits and handshake status information of the MSCAN
module as described below.
Read: Anytime
Write: Anytime when INITRQ = 1 and INITAK = 1, except CANE which is write once in normal and
anytime in special system operation modes when the MSCAN is in initialization mode (INITRQ = 1 and
INITAK = 1).
224
CLKSRC
LOOPB
LISTEN
WUPM
BORM
CANE
Field
7
6
5
4
3
2
Reset:
W
R
MSCAN Control Register 1 (CANCTL1)
MSCAN Enable
0 MSCAN module is disabled
1 MSCAN module is enabled
MSCAN Clock Source — This bit defines the clock source for the MSCAN module (only for systems with a clock
generation module;
0 MSCAN clock source is the oscillator clock
1 MSCAN clock source is the bus clock
Loopback Self Test Mode — When this bit is set, the MSCAN performs an internal loopback which can be used
for self test operation. The bit stream output of the transmitter is fed back to the receiver
internally.Section 12.5.4.6, “Loopback Self Test
0 Loopback self test disabled
1 Loopback self test enabled
Listen Only Mode — This bit configures the MSCAN as a CAN bus monitor. When LISTEN is set, all valid CAN
messages with matching ID are received, but no acknowledgement or error frames are sent out (see
Section 12.5.4.4, “Listen-Only
applications which require “hot plugging” or throughput analysis. The MSCAN is unable to transmit any
messages when listen only mode is active.
0 Normal operation
1 Listen only mode activated
Bus-Off Recovery Mode — This bits configures the bus-off state recovery mode of the MSCAN. Refer to
Section 12.6.2, “Bus-Off
0 Automatic bus-off recovery (see Bosch CAN 2.0A/B protocol specification)
1 Bus-off recovery upon user request
Wake-Up Mode — If WUPE in CANCTL0 is enabled, this bit defines whether the integrated low-pass filter is
applied to protect the MSCAN from spurious wake-up (see
0 MSCAN wakes up on any dominant level on the CAN bus
1 MSCAN wakes up only in case of a dominant pulse on the CAN bus that has a length of T
CANE
0
7
= Unimplemented
CLKSRC
Figure 12-5. MSCAN Control Register 1(CANCTL1)
Table 12-2. CANCTL1 Register Field Descriptions
6
0
Section 12.5.3.3, “Clock
Recovery,” for details.
MC9S08DV60 Series Data Sheet, Rev 3
LOOPB
Mode”). In addition, the error counters are frozen. Listen only mode supports
0
5
LISTEN
System,” and
4
1
Mode.
Description
Section Figure 12-42., “MSCAN Clocking
BORM
Section 12.5.5.4, “MSCAN Sleep
0
3
WUPM
2
0
Freescale Semiconductor
SLPAK
0
1
wup
Mode”).
Scheme,”).
INITAK
0
1
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