MC9S08DZ16CLF Freescale Semiconductor, MC9S08DZ16CLF Datasheet - Page 249

IC MCU 16K FLASH 1K RAM 48-LQFP

MC9S08DZ16CLF

Manufacturer Part Number
MC9S08DZ16CLF
Description
IC MCU 16K FLASH 1K RAM 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheets

Specifications of MC9S08DZ16CLF

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
For Use With
EVB9S08DZ60 - BOARD EVAL FOR 9S08DZ60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S08DZ16CLF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
12.4.5
This register defines the local priority of the associated message transmit buffer. The local priority is used
for the internal prioritization process of the MSCAN and is defined to be highest for the smallest binary
number. The MSCAN implements the following internal prioritization mechanisms:
In cases of more than one buffer having the same lowest priority, the message buffer with the lower index
number wins.
Read: Anytime when TXEx flag is set (see
(CANTFLG)”) and the corresponding transmit buffer is selected in CANTBSEL (see
“MSCAN Transmit Buffer Selection Register
Write: Anytime when TXEx flag is set (see
(CANTFLG)”) and the corresponding transmit buffer is selected in CANTBSEL (see
“MSCAN Transmit Buffer Selection Register
12.4.6
If the TIME bit is enabled, the MSCAN will write a time stamp to the respective registers in the active
transmit or receive buffer as soon as a message has been acknowledged on the CAN bus (see
Freescale Semiconductor
Reset:
All transmission buffers with a cleared TXEx flag participate in the prioritization immediately
before the SOF (start of frame) is sent.
The transmission buffer with the lowest local priority field wins the prioritization.
W
R
Transmit Buffer Priority Register (TBPR)
Time Stamp Register (TSRH–TSRL)
PRIO7
0
7
DLC3
0
0
0
0
0
0
0
0
1
Figure 12-35. Transmit Buffer Priority Register (TBPR)
PRIO6
6
0
DLC2
MC9S08DZ60 Series Data Sheet, Rev. 4
0
0
0
0
1
1
1
1
0
Table 12-33. Data Length Codes
Data Length Code
PRIO5
0
5
Section 12.3.6, “MSCAN Transmitter Flag Register
Section 12.3.6, “MSCAN Transmitter Flag Register
(CANTBSEL)”).
(CANTBSEL)”).
PRIO4
DLC1
4
0
0
0
1
1
0
0
1
1
0
Chapter 12 Freescale’s Controller Area Network (S08MSCANV1)
PRIO3
0
3
DLC0
0
1
0
1
0
1
0
1
0
PRIO2
2
0
Data Byte
Count
PRIO1
0
1
2
3
4
5
6
7
8
Section 12.3.10,
Section 12.3.10,
0
1
PRIO0
0
0
249

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