ADA4899-1YRDZ Analog Devices Inc, ADA4899-1YRDZ Datasheet - Page 5

• Manufacturer Part Number: ADA4899-1YRDZ
• Description: IC OPAMP VF ULN ULDIST 8SOIC
• Manufacturer: Analog Devices Inc
• Type: Voltage Feedback Amplifierr

Specifications of ADA4899-1YRDZ

• Slew Rate: 310 V/µs
• Design Resources: High Speed, Precision, Differential AC-Coupled Drive Circuit for AD7625 (CN0080)
• Amplifier Type: Voltage Feedback
• Number Of Circuits: 1
• -3db Bandwidth: 600MHz
• Current - Input Bias: 6µA
• Voltage - Input Offset: 35µV
• Current - Supply: 14.7mA
• Current - Output / Channel: 200mA
• Voltage - Supply, Single/dual (±): 4.5 V ~ 12 V, ±2.25 V ~ 6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width) Exposed Pad, 8-eSOIC. 8-HSOIC
• Op Amp Type: High Speed
• No. Of Amplifiers: 1
• Bandwidth: 600MHz
• Supply Voltage Range: 5V To 12V
• Amplifier Case Style: SOIC
• No. Of Pins: 8
• Rail/rail I/o Type: No
• Number Of Elements: 1
• Common Mode Rejection Ratio: 90dB
• Input Offset Voltage: 210uV
• Input Bias Current: 12uA
• Single Supply Voltage (typ): 5/9V
• Dual Supply Voltage (typ): ±3/±5V
• Voltage Gain In Db: 80dB
• Power Supply Rejection Ratio: 84dB
• Power Supply Requirement: Single/Dual
• Shut Down Feature: No
• Single Supply Voltage (min): 4.5V
• Single Supply Voltage (max): 12V
• Dual Supply Voltage (min): ±2.25V
• Dual Supply Voltage (max): ±6V
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 8
• Package Type: SOIC N EP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Output Type: -
• Gain Bandwidth Product: -
• Lead Free Status / Rohs Status: Compliant

ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Supply Voltage
Power Dissipation
Differential Input Voltage
Differential Input Current
Storage Temperature Range
Operating Temperature Range
Lead Temperature (Soldering 10 sec)
Junction Temperature
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation in the ADA4899-1
package is limited by the associated rise in junction temperature
(T
the junction temperature. At approximately 150°C, which is the
glass transition temperature, the plastic changes its properties.
Even temporarily exceeding this temperature limit may change
the stresses that the package exerts on the die, permanently
shifting the parametric performance of the ADA4899-1.
Exceeding a junction temperature of 150°C for an extended
period can result in changes in silicon devices, potentially
causing failure.
The still-air thermal properties of the package and PCB (θ
the ambient temperature (T
the package (P
The junction temperature is calculated as
The power dissipated in the package (P
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. The quiescent
power is the voltage between the supply pins (V
quiescent current (I
midsupply, the total drive power is V
dissipated in the package and some in the load (V
J
) on the die. The plastic encapsulating the die locally reaches
T
J
= T
A
+ (P
D
) determine the junction temperature of the die.
D
× θ
S
). Assuming the load (R
JA
)
A
), and the total power dissipated in
S
/2 × I
D
) is the sum of the
OUT
L
) is referenced to
, some of which is
Rating
12.6 V
See Figure 4
±1.2 V
±10 mA
–65°C to +150°C
–40°C to +125°C
300°C
150°C
S
) times the
OUT
× I
OUT
JA
).
),
Rev. B | Page 5 of 20
The difference between the total drive power and the load
power is the drive power dissipated in the package.
RMS output voltages should be considered. If R
V
I
worst case, when V
In single-supply operation with R
is V
Airflow increases heat dissipation, effectively reducing θ
addition, more metal directly in contact with the package leads
from metal traces, through holes, ground, and power planes
reduces the θ
plane significantly reduces the overall thermal resistance of the
package.
Figure 4 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the exposed paddle
(EPAD) 8-lead SOIC (70°C/W) and 8-lead LFCSP (70°C/W)
packages on a JEDEC standard 4-layer board. θ
approximations.
ESD CAUTION
OUT
S
–, as in single-supply operation, the total drive power is V
. If the rms signal levels are indeterminate, consider the
OUT
P
P
P
Figure 4. Maximum Power Dissipation vs. Ambient Temperature
D
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
D
D
= V
= Quiescent Power + (Total Drive Power – Load Power)
–40
=
=
(
(
V
V
S
/2.
S
S
JA
×
×
–20
. Soldering the exposed paddle to the ground
I
I
S
S
)
) (
+
OUT
+
⎛
⎜
⎜
⎝
LFCSP AND SOIC
0
V
V
AMBIENT TEMPERATURE (°C)
2
= V
S
S
R
/
×
L
4
S
V
)
20
/4 for R
2
R
OUT
L
⎞
⎟
⎟
⎠
40
L
–
referenced to V
L
V
to midsupply
OUT
R
L
60
2
80
ADA4899-1
JA
L
is referenced to
values are
S
–, worst case
100
JA
120
. In
S
×